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authorThomas Gleixner <tglx@linutronix.de>2013-03-21 22:50:04 +0100
committerThomas Gleixner <tglx@linutronix.de>2013-04-08 17:39:29 +0200
commitf4e2e9a4b26789d963000f974f2dc80230bb4674 (patch)
tree14773281c4e226fd4ee4122c09a18b5509c3d0b9 /arch/xtensa
parent7d1a941731fabf27e5fb6edbebb79fe856edb4e5 (diff)
xtensa: Use generic idle loop
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: Chris Zankel <chris@zankel.net> Link: http://lkml.kernel.org/r/20130321215235.546600507@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/Kconfig1
-rw-r--r--arch/xtensa/kernel/process.c14
2 files changed, 3 insertions, 12 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index b09de49dbec5..e0144ff4624d 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -19,6 +19,7 @@ config XTENSA
select CLONE_BACKWARDS
select IRQ_DOMAIN
select HAVE_OPROFILE
+ select GENERIC_IDLE_LOOP
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 5cd82e9f601c..1c85323f01d7 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -105,19 +105,9 @@ void coprocessor_flush_all(struct thread_info *ti)
/*
* Powermanagement idle function, if any is provided by the platform.
*/
-
-void cpu_idle(void)
+void arch_cpu_idle(void)
{
- local_irq_enable();
-
- /* endless idle loop with no priority at all */
- while (1) {
- rcu_idle_enter();
- while (!need_resched())
- platform_idle();
- rcu_idle_exit();
- schedule_preempt_disabled();
- }
+ platform_idle();
}
/*