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authorXiao Bo Zhao <xiaoboz@nvidia.com>2012-06-07 17:20:18 -0700
committerRyan Wong <ryanw@nvidia.com>2012-06-11 22:03:47 -0700
commit713f9aa4a7b9fa61610730be2b8dc15319f7ed1b (patch)
tree0677fe811af9b7819cbccceac49b4ea4be2a7dfa /arch
parent83af3e7dbab59e593347a7f89123b9f4abef469e (diff)
Tuned the runnable threads threshold from 5/9/13 to 5/9/10 in order to improve performance
Change-Id: Iae3aa9e92388df74897c90951567325fe3d88550 Reviewed-on: http://git-master/r/108074 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/cpu-tegra3.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/cpu-tegra3.c b/arch/arm/mach-tegra/cpu-tegra3.c
index 386e4571949c..50dca87da587 100644
--- a/arch/arm/mach-tegra/cpu-tegra3.c
+++ b/arch/arm/mach-tegra/cpu-tegra3.c
@@ -191,7 +191,7 @@ enum {
#define NR_FSHIFT 2
static unsigned int nr_run_thresholds[] = {
/* 1, 2, 3, 4 - on-line cpus target */
- 5, 9, 13, UINT_MAX /* avg run threads * 4 (e.g., 9 = 2.25 threads) */
+ 5, 9, 10, UINT_MAX /* avg run threads * 4 (e.g., 9 = 2.25 threads) */
};
static unsigned int nr_run_hysteresis = 2; /* 0.5 thread */
static unsigned int nr_run_last;