diff options
author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2011-08-03 19:44:54 +0530 |
---|---|---|
committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-05 17:59:42 -0700 |
commit | c68b47058aac2bb396dada7c7fd02a97b339c44d (patch) | |
tree | d8dad5046cd7c215af7df0e96825df0611e95c3c /arch | |
parent | d94b060899f4c68d5a501fa0e03efb73b9677308 (diff) |
arm: tegra: usb_phy: vddio_hsic power rail control
Switching off vddio_hsic power rail when hsic interface is
not getting used.
BUG 856606
Change-Id: I804303a933a63e6af0faa035da889ebc65769137
Reviewed-on: http://git-master/r/44773
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 5f6497e7f205..48feb5adf6e4 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -1424,6 +1424,12 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy, bool is_dpd) void __iomem *base = phy->regs; struct tegra_uhsic_config *uhsic_config = phy->config; + if (uhsic_config->enable_gpio != -1) { + gpio_set_value_cansleep(uhsic_config->enable_gpio, 1); + /* keep hsic reset asserted for 1 ms */ + udelay(1000); + } + val = readl(base + UHSIC_PADS_CFG1); val &= ~(UHSIC_PD_BG | UHSIC_PD_TX | UHSIC_PD_TRK | UHSIC_PD_RX | UHSIC_PD_ZI | UHSIC_RPD_DATA | UHSIC_RPD_STROBE); @@ -1503,6 +1509,7 @@ static int uhsic_phy_power_off(struct tegra_usb_phy *phy, bool is_dpd) { unsigned long val; void __iomem *base = phy->regs; + struct tegra_uhsic_config *uhsic_config = phy->config; val = readl(base + UHSIC_PADS_CFG1); val &= ~UHSIC_RPU_STROBE; @@ -1518,6 +1525,12 @@ static int uhsic_phy_power_off(struct tegra_usb_phy *phy, bool is_dpd) val &= ~UHSIC_PHY_ENABLE; writel(val, base + USB_SUSP_CTRL); + if (uhsic_config->enable_gpio != -1) { + gpio_set_value_cansleep(uhsic_config->enable_gpio, 0); + /* keep hsic reset de-asserted for 1 ms */ + udelay(1000); + } + return 0; } |