CR ENGR00048159 Add L2 flush for all mxc PF

Patch for CR ENGR00048159 Add L2 flush for all mxc PF.
This patch adds an outer cache flush_all function needed by the IPU
mxc_pf driver to synchronize WT cached buffers in the L2 cache.
Applies to linux 2.6.22 kernel on MX3 platforms.

http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00048159-Add-L2-flush-for-all-mxc-P.patch

1 files changed, 8 insertions, 0 deletions

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 24d791ebf9c7..b074dbb75dc9 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -47,6 +47,13 @@ static inline void l2x0_inv_all(void)
 	cache_sync();
 }
 
+static void l2x0_flush_all(void)
+{
+	/* clean and invalidate all ways */
+	sync_writel(0xff, L2X0_CLEAN_INV_WAY, 0xff);
+	cache_sync();
+}
+
 static void l2x0_inv_range(unsigned long start, unsigned long end)
 {
 	unsigned long addr;
@@ -109,6 +116,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 	outer_cache.inv_range = l2x0_inv_range;
 	outer_cache.clean_range = l2x0_clean_range;
 	outer_cache.flush_range = l2x0_flush_range;
+	outer_cache.flush_all = l2x0_flush_all;
 
 	printk(KERN_INFO "L2X0 cache controller enabled\n");
 }