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authorBorislav Petkov <borislav.petkov@amd.com>2009-02-03 16:24:22 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2009-02-12 09:31:04 -0800
commitc29f6564c1910b0a5ac22c840fc5ba031cea82b1 (patch)
tree5beb390843d0ab3fbe8c7de50c93ded540627c8b /arch
parent2b46f3769896dc04e1e49144d282e4655677105a (diff)
x86: APIC: enable workaround on AMD Fam10h CPUs
commit 858770619debfb9269add63e4ba8b7c6b5538dd1 upstream. Impact: fix to enable APIC for AMD Fam10h on chipsets with a missing/b0rked ACPI MP table (MADT) Booting a 32bit kernel on an AMD Fam10h CPU running on chipsets with missing/b0rked MP table leads to a hang pretty early in the boot process due to the APIC not being initialized. Fix that by falling back to the default APIC base address in 32bit code, as it is done in the 64bit codepath. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/apic_32.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index f88bd0d982b0..ffc633cb5704 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1115,7 +1115,7 @@ static int __init detect_init_APIC(void)
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_AMD:
if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) ||
- (boot_cpu_data.x86 == 15))
+ (boot_cpu_data.x86 >= 15))
break;
goto no_apic;
case X86_VENDOR_INTEL: