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authorMarek Roszko <mark.roszko@gmail.com>2014-08-23 23:12:04 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-09-05 10:32:06 +0200
commit4334ac2db2be9e278c95fd15260c1f49f698ffc5 (patch)
treeb6e13a3fda5d1c41495b697abfb0c0a31eff52c3 /arch
parent0d37899363b0e5486f8800231b7edd75e8b60942 (diff)
pinctrl: at91: add drive strength configuration
The SAMA5 and SAM9x5 series both have drive strength options for the PIOs. This patch adds the ability to set one of three hardware options for drive strengths of low, medium or high for the each pin. The actual current output of the chip based on the setting is defined in the datasheets and varies per pins separate from banks and with supply voltage. This patch adds three new dt-bindings that allow setting the strength when configuring pins. By default, no change will be made to the drive strength of a pin from its reset value. Due to the difference between the register addresses of the SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added. Signed-off-by: Marek Roszko <mark.roszko@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pio.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
index 732b11c37f1a..7b7366253ceb 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -71,4 +71,10 @@
#define ABCDSR_PERIPH_C 0x2
#define ABCDSR_PERIPH_D 0x3
+#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/
+#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/
+
+#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/
+#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/
+
#endif