diff options
| author | Stefan Agner <stefan@agner.ch> | 2014-12-01 12:51:32 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan@agner.ch> | 2014-12-02 18:08:13 +0100 |
| commit | 8ce6c26cac294eeddd4efdc0931dd54aeddc9608 (patch) | |
| tree | 94a2a4904421dfe219647b92f24d45d968fe0910 /arch | |
| parent | acf1e098602ddc634bc657345feb694555ec247b (diff) | |
ARM: dts: vf610: add system reset controller and syscon-reboot
Add the system reset controller (SRC) module and use syscon-reboot
to register a restart handler which restarts the SoC using the
SRC SW_RST bit.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/vf500.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vfxxx.dtsi | 12 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index de6700542714..3f38f49dcb02 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -130,6 +130,10 @@ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; }; +&src { + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; +}; + &uart0 { interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 505969ae8093..dddcd0c21199 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -43,6 +43,13 @@ clock-frequency = <32768>; }; + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&src>; + offset = <0x0>; + mask = <0x1000>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -318,6 +325,11 @@ clocks = <&clks VF610_CLK_USBC0>; status = "disabled"; }; + + src: src@4006e000 { + compatible = "fsl,vf610-src", "syscon"; + reg = <0x4006e000 0x1000>; + }; }; aips1: aips-bus@40080000 { |