diff options
| author | Liu Ying <Ying.liu@freescale.com> | 2012-09-07 13:25:54 +0800 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2012-10-11 16:26:47 +0800 |
| commit | bb09531ae9727200fa1620339745f7d279e1d0b0 (patch) | |
| tree | ede568f8d6cef7273d565dc1e41fbc6f9ee84036 /arch | |
| parent | 8298c48cee8adfe3701c011a3a0e90c0172b6c24 (diff) | |
ENGR00223797-8 MX6 SabreSD:Reserve primary fbmem with base addr
This patch supports to reserve primary framebuffer's memory
separately if its base address is set in kernel command line
with 'fb0base=' option. To support this feature, note that
'fbmem=' is also required to be set to specify the size of the
memory reserved for the primary framebuffer. This patch is for
Android kernel only.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 9bcc99c5e775c774d2092690a37e4c20e338e570)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabresd.c | 41 |
1 files changed, 31 insertions, 10 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.c b/arch/arm/mach-mx6/board-mx6q_sabresd.c index bf4276f21ef7..f041f3116436 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabresd.c +++ b/arch/arm/mach-mx6/board-mx6q_sabresd.c @@ -1691,6 +1691,14 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, str += 7; imx6q_gpu_pdata.reserved_mem_size = memparse(str, &str); } + /* Primary framebuffer base address */ + str = t->u.cmdline.cmdline; + str = strstr(str, "fb0base="); + if (str != NULL) { + str += 8; + pdata_fb[0].res_base[0] = + simple_strtol(str, &str, 16); + } break; } } @@ -2001,7 +2009,29 @@ static struct sys_timer mx6_sabresd_timer = { static void __init mx6q_sabresd_reserve(void) { phys_addr_t phys; - int i; + int i, fb0_reserved = 0, fb_array_size; + + /* + * Reserve primary framebuffer memory if its base address + * is set by kernel command line. + */ + fb_array_size = ARRAY_SIZE(sabresd_fb_data); + if (fb_array_size > 0 && sabresd_fb_data[0].res_base[0] && + sabresd_fb_data[0].res_size[0]) { + memblock_reserve(sabresd_fb_data[0].res_base[0], + sabresd_fb_data[0].res_size[0]); + memblock_remove(sabresd_fb_data[0].res_base[0], + sabresd_fb_data[0].res_size[0]); + fb0_reserved = 1; + } + for (i = fb0_reserved; i < fb_array_size; i++) + if (sabresd_fb_data[i].res_size[0]) { + /* Reserve for other background buffer. */ + phys = memblock_alloc(sabresd_fb_data[i].res_size[0], + SZ_4K); + memblock_remove(phys, sabresd_fb_data[i].res_size[0]); + sabresd_fb_data[i].res_base[0] = phys; + } #if defined(CONFIG_MXC_GPU_VIV) || defined(CONFIG_MXC_GPU_VIV_MODULE) if (imx6q_gpu_pdata.reserved_mem_size) { @@ -2019,15 +2049,6 @@ static void __init mx6q_sabresd_reserve(void) imx_ion_data.heaps[0].base = phys; } #endif - - for (i = 0; i < ARRAY_SIZE(sabresd_fb_data); i++) - if (sabresd_fb_data[i].res_size[0]) { - /* reserve for background buffer */ - phys = memblock_alloc(sabresd_fb_data[i].res_size[0], - SZ_4K); - memblock_remove(phys, sabresd_fb_data[i].res_size[0]); - sabresd_fb_data[i].res_base[0] = phys; - } } /* |