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authorBhavesh Parekh <bparekh@nvidia.com>2013-10-31 12:15:22 +0530
committerHarry Hong <hhong@nvidia.com>2014-04-21 19:15:07 -0700
commit5225d94cf061f4faf83dc070cc50cf5328c3b0d9 (patch)
tree2060601695398b34559ee90dbca0eccc73eff1d3 /arch
parente0591343e481d0ad84f5d7f1a5889d7f2d5a0d83 (diff)
ARM: Tegra: Fix PowerGate status logic
In the code we are reading value of PMC_PWRGATE_TOGGLE in reg variable. But loop was checking for status variable. Fix the same Bug 1479800 Change-Id: If18bf9ddcb403b60f084dee2edf3980e06ff2e3b Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com> Reviewed-on: http://git-master/r/309991 (cherry picked from commit 095ba8e09b545222fdd343f9c65692057eb7bb29) Reviewed-on: http://git-master/r/396763 Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/powergate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index c9ebf2ecb30f..771fe604b2fe 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -90,7 +90,7 @@ int tegra_powergate_set(int id, bool new_state)
udelay(1);
reg = pmc_read(PWRGATE_TOGGLE);
contention_timeout--;
- } while ((contention_timeout > 0) && (status & PWRGATE_TOGGLE_START));
+ } while ((contention_timeout > 0) && (reg & PWRGATE_TOGGLE_START));
if (contention_timeout <= 0)
pr_err(" Timed out waiting for PMC to submit \
@@ -107,7 +107,7 @@ int tegra_powergate_set(int id, bool new_state)
udelay(1);
reg = pmc_read(PWRGATE_TOGGLE);
contention_timeout--;
- } while ((contention_timeout > 0) && (status & PWRGATE_TOGGLE_START));
+ } while ((contention_timeout > 0) && (reg & PWRGATE_TOGGLE_START));
if (contention_timeout <= 0)
pr_err(" Timed out waiting for PMC to accept \