diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2011-06-25 16:42:37 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:29 -0800 |
| commit | 0e0ccdb65830189d071790b045a835028b1ffb11 (patch) | |
| tree | 39f07e3fd603876bec8ce821c34fddd9ea9f23ae /arch | |
| parent | 49adefb5a72e65dd76165efc1c291e67d67be736 (diff) | |
arm: tegra: clocks: add fuse and fuse_burn clocks
keep fuse clock always enabled to allow fuse
read writes from multiple clients
Bug 796825
Original-Change-Id: Icb2693d791d08ca7083f9a61ab833425d2ab83b4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/36504
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re192b5ff54aea3ce762bd103b1a9a62ef718b81c
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 6d604e42f5b0..ff5b308f6991 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -159,6 +159,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "emc", NULL, 0, true }, { "cpu", NULL, 0, true }, { "kfuse", NULL, 0, true }, + { "fuse", NULL, 0, true }, { "pll_u", NULL, 480000000, false }, { "sdmmc1", "pll_p", 48000000, false}, { "sdmmc3", "pll_p", 48000000, false}, diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index c4b1b5342189..369bd7194a78 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -3757,6 +3757,8 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("kfuse", "kfuse-tegra", NULL, 40, 0, 26000000, mux_clk_m, 0), + PERIPH_CLK("fuse", "fuse-tegra", "fuse", 39, 0, 26000000, mux_clk_m, PERIPH_ON_APB), + PERIPH_CLK("fuse_burn", "fuse-tegra", "fuse_burn", 39, 0, 26000000, mux_clk_m, PERIPH_ON_APB), PERIPH_CLK("apbif", "tegra30-ahub", "apbif", 107, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s0", "tegra30-i2s.0", NULL, 30, 0x1d8, 26000000, mux_pllaout0_audio0_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("i2s1", "tegra30-i2s.1", NULL, 11, 0x100, 26000000, mux_pllaout0_audio1_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), |