diff options
| author | Chaitanya Bandi <bandik@nvidia.com> | 2012-04-04 20:14:39 +0530 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-04-05 09:31:37 -0700 |
| commit | b03b2c812d81a334bd541512b2e3028064b27fd8 (patch) | |
| tree | 372ea8862aaa1dc2087cda24b335bc5b4ea4e586 /arch | |
| parent | 55ee2d30ce55df625daa45e823d633003dcdc12b (diff) | |
ARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail
It is observed that voltage rails for 3V3 is taking around 400us
for setting it output. Providing the startup delay of 500us for this
rail so that rails are stablized at desired level before any consumer
uses that rail.
Bug 959902
Change-Id: I602b428db44d595a94d69fccb3340a77c3819a3b
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/94537
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/board-enterprise-power.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/board-enterprise-power.c b/arch/arm/mach-tegra/board-enterprise-power.c index 26a16083981c..9d7a4d6e6dff 100644 --- a/arch/arm/mach-tegra/board-enterprise-power.c +++ b/arch/arm/mach-tegra/board-enterprise-power.c @@ -579,7 +579,7 @@ GPIO_REG(4, sdmmc3_vdd_sel, tps80031_rails(SMPS4), /* Macro for defining fixed regulator sub device data */ #define FIXED_REG(_id, _name, _input_supply, _gpio_nr, _active_high, \ - _millivolts, _boot_state) \ + _millivolts, _boot_state, _sdelay) \ static struct regulator_init_data ri_data_##_name = \ { \ .supply_regulator = _input_supply, \ @@ -602,6 +602,7 @@ GPIO_REG(4, sdmmc3_vdd_sel, tps80031_rails(SMPS4), .enable_high = _active_high, \ .enabled_at_boot = _boot_state, \ .init_data = &ri_data_##_name, \ + .startup_delay = _sdelay, \ }; \ static struct platform_device fixed_reg_##_name##_dev = { \ .name = "reg-fixed-voltage", \ @@ -612,25 +613,25 @@ GPIO_REG(4, sdmmc3_vdd_sel, tps80031_rails(SMPS4), } FIXED_REG(0, pmu_5v15_en, NULL, - ENT_TPS80031_GPIO_REGEN1, true, 5000, 0 ); + ENT_TPS80031_GPIO_REGEN1, true, 5000, 0 , 0); FIXED_REG(2, pmu_hdmi_5v0_en, "fixed_reg_pmu_5v15_en", - ENT_TPS80031_GPIO_SYSEN, true, 5000, 0); + ENT_TPS80031_GPIO_SYSEN, true, 5000, 0, 0); FIXED_REG(3, vdd_fuse_en, "fixed_reg_pmu_3v3_en", - TEGRA_GPIO_PM0, true, 3300, 0); + TEGRA_GPIO_PM0, true, 3300, 0, 0); FIXED_REG(5, cam_ldo_2v8_en, NULL, - TEGRA_GPIO_PM7, true, 2800, 0); + TEGRA_GPIO_PM7, true, 2800, 0, 0); FIXED_REG(6, cam_ldo_1v8_en, NULL, - TEGRA_GPIO_PF1, true, 1800, 0); + TEGRA_GPIO_PF1, true, 1800, 0, 0); /* Enterprise A02- specific */ FIXED_REG(1, pmu_3v3_en, "fixed_reg_pmu_5v15_en", - ENT_TPS80031_GPIO_REGEN2, true, 3300, 0); + ENT_TPS80031_GPIO_REGEN2, true, 3300, 0, 500); /* Enterprise A03+ specific */ FIXED_REG(7, vdd_sdmmc3_2v85_en, NULL, - TEGRA_GPIO_PF2, true, 2850, 0); + TEGRA_GPIO_PF2, true, 2850, 0, 0); FIXED_REG(8, lcd_1v8_en, NULL, - TEGRA_GPIO_PB2, true, 1800, 0); + TEGRA_GPIO_PB2, true, 1800, 0, 0); #define ADD_FIXED_REG(_name) (&fixed_reg_##_name##_dev) |