diff options
| author | Krishna Reddy <vdumpa@nvidia.com> | 2012-05-03 19:16:24 -0700 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-05-07 08:31:45 -0700 |
| commit | f0399f93ea9a67305a1a550142f09c48ef7ea093 (patch) | |
| tree | 55eaca53043c7ba6699c3bc5923e92a5cd8cc377 /arch | |
| parent | b25193d5c3e2c59169c127d23b59123136cfefa7 (diff) | |
arm: tegra: pl310: Enable dynamic clock gating and standy.
Bug 947861
Change-Id: Ib4ce7bfa3624562a766678a2ef20ebdcd3055d89
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/100462
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index f0c0cb69896f..aef4201605db 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -343,6 +343,7 @@ void tegra_init_cache(bool init) writel(0x770, p + L2X0_DATA_LATENCY_CTRL); #endif #endif + writel(0x3, p + L2X0_POWER_CTRL); aux_ctrl = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (aux_ctrl & 0x700) << (17-8); aux_ctrl |= 0x7C000001; |