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authorDan Willemsen <dwillemsen@nvidia.com>2012-02-15 09:49:40 -0800
committerRohan Somvanshi <rsomvanshi@nvidia.com>2012-02-17 08:00:23 -0800
commitf3636b910624bcc823a03fe03c40e71d1a5be0bb (patch)
tree4e42ba3777123f0907c81e79b3694d6394602f40 /arch
parent94d7f846868c87748f3ab17cbc8d100f5bf0d896 (diff)
ARM: tegra: Remove NET_SKB_PAD
In include/linux/skbuff.h, this is already defined as max(32, L1_CACHE_BYTES), which is identical to our define of L1_CACHE_BYTES. The comment also mentions that there are assumptions in the code that expects it to be at least 32. Change-Id: If855651acf3e45b34db8d9f2c047c9fe5001b1c5 Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/84106 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/include/mach/memory.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/include/mach/memory.h b/arch/arm/mach-tegra/include/mach/memory.h
index fb7a1f2877a4..5f51066482e3 100644
--- a/arch/arm/mach-tegra/include/mach/memory.h
+++ b/arch/arm/mach-tegra/include/mach/memory.h
@@ -35,7 +35,6 @@
* buffers in usbnet.c to become unaligned.
*/
#define NET_IP_ALIGN 0
-#define NET_SKB_PAD L1_CACHE_BYTES
#define CONSISTENT_DMA_SIZE (14 * SZ_1M)