diff options
| author | Ray Poudrier <rapoudrier@nvidia.com> | 2011-08-24 15:37:44 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-25 16:41:04 -0700 |
| commit | 6efb379dffdb4cbff644e7f52827bcc672278e68 (patch) | |
| tree | 3eb3e17e6ca662b9cd083930fe0d1860ebcee588 /arch | |
| parent | 3867318270d945d2e6cf20531481e0383c1bd30a (diff) | |
Revert "ARM: Tegra: cpu: Set G-CPU L2 cache latency to 0x777/777"
This reverts commit 24d6d42fd0e853fb6ca8dc961e42a3eebde1a0d7.
Changes the latency back to 441/551
Change-Id: I0123ef98818ea55fd0033245c53ec6e7c4b6dfab
Reviewed-on: http://git-master/r/49066
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/cortex-a9.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 679e12b97d9e..43f861883622 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -180,8 +180,8 @@ void __init tegra_init_cache(void) writel(0x221, p + L2X0_TAG_LATENCY_CTRL); writel(0x221, p + L2X0_DATA_LATENCY_CTRL); } else { - writel(0x777, p + L2X0_TAG_LATENCY_CTRL); - writel(0x777, p + L2X0_DATA_LATENCY_CTRL); + writel(0x441, p + L2X0_TAG_LATENCY_CTRL); + writel(0x551, p + L2X0_DATA_LATENCY_CTRL); } #else writel(0x770, p + L2X0_TAG_LATENCY_CTRL); diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S index a2884b839e7b..96f915725eb1 100644 --- a/arch/arm/mach-tegra/cortex-a9.S +++ b/arch/arm/mach-tegra/cortex-a9.S @@ -661,8 +661,8 @@ ENTRY(__cortex_a9_l2x0_restart) mov32 r5, (TEGRA_FLOW_CTRL_BASE-IO_PPSB_PHYS+IO_PPSB_VIRT) ldr r5, [r5, #0x2C] @ FLOW_CTRL_CLUSTER_CONTROL ands r5, r5, #1 @ 0 == G cluster, 1 == LP cluster - movweq r5, #0x777 @ G tag - movweq r6, #0x777 @ G data + movweq r5, #0x441 @ G tag + movweq r6, #0x551 @ G data movwne r5, #0x221 @ LP tag movwne r6, #0x221 @ LP data #endif |