diff options
| author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2011-08-25 17:59:20 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-25 16:54:37 -0700 |
| commit | 9b70b4ab5f94852229937055cd8ea7526a2e2f63 (patch) | |
| tree | c0eed4b1382531a460a635f0f1bc5acac0981c64 /arch | |
| parent | 6efb379dffdb4cbff644e7f52827bcc672278e68 (diff) | |
usb: ehci: tegra: Fix resume issue for T30 HSIC
After resume, HOSPC register needs to be configured
correctly for HSIC to be function. Also no need to set
UHSIC_RPU_STROBE line during hsic bus idle sequence.
BUG 868313
Change-Id: I79debb424021f375e9a93df731848cfbc95068bc
Reviewed-on: http://git-master/r/49195
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 55bbe7ecf46f..ef22c89e59f5 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -2365,6 +2365,15 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy) void __iomem *base = phy->regs; if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) { +#ifndef CONFIG_ARCH_TEGRA_2x_SOC + /* Change the USB controller PHY type to HSIC */ + val = readl(base + HOSTPC1_DEVLC); + val &= ~HOSTPC1_DEVLC_PTS(HOSTPC1_DEVLC_PTS_MASK); + val |= HOSTPC1_DEVLC_PTS(HOSTPC1_DEVLC_PTS_HSIC); + val &= ~HOSTPC1_DEVLC_PSPD(HOSTPC1_DEVLC_PSPD_MASK); + val |= HOSTPC1_DEVLC_PSPD(HOSTPC1_DEVLC_PSPD_HIGH_SPEED); + writel(val, base + HOSTPC1_DEVLC); +#endif val = readl(base + UHSIC_MISC_CFG0); val |= UHSIC_DETECT_SHORT_CONNECT; writel(val, base + UHSIC_MISC_CFG0); @@ -2376,7 +2385,9 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy) val = readl(base + UHSIC_PADS_CFG1); val &= ~UHSIC_RPD_STROBE; +#ifdef CONFIG_ARCH_TEGRA_2x_SOC val |= UHSIC_RPU_STROBE; +#endif writel(val, base + UHSIC_PADS_CFG1); } return 0; |