diff options
| author | Gary King <GKing@nvidia.com> | 2010-01-29 19:24:04 -0800 |
|---|---|---|
| committer | Gerrit Code Review <gerrit2@git-master-01.nvidia.com> | 2010-01-29 19:24:04 -0800 |
| commit | e1e9d2a0bb7dc6e638a6cbdcf1aa76cc99c04548 (patch) | |
| tree | be2e885263ae9208dfa008bbda6417be6eb3cf71 /arch | |
| parent | 6ba97542572e9d9544e501525095a5381c290391 (diff) | |
| parent | 115c9100be6bb6e8b284f403eed772c5d32490e7 (diff) | |
Merge "tegra RM: Clipped CPU voltage to PMU capabilities." into android-tegra-2.6.29
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c | 3 |
3 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c index e7781256b71e..04a6952442ff 100644 --- a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c +++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c @@ -542,6 +542,7 @@ void NvRmPrivCoreVoltageInit(NvRmDeviceHandle hRmDevice) // nominal level as well (bump PMU ref count along the way). if (NvRmPrivIsCpuRailDedicated(hRmDevice)) { + NvRmPmuVddRailCapabilities cap; NvRmMilliVolts NominalCpuMv = NvRmPrivModuleVscaleGetMV( hRmDevice, NvRmModuleID_Cpu, NvRmPrivGetSocClockLimits(NvRmModuleID_Cpu)->MaxKHz); @@ -550,6 +551,14 @@ void NvRmPrivCoreVoltageInit(NvRmDeviceHandle hRmDevice) NV_ASSERT(pPmuRail); NV_ASSERT(pPmuRail->NumAddress); CpuRailAddress = pPmuRail->AddressList[0].Address; + + // Clip nominal CPU voltage to minimal PMU capabilities, and set it. + // (note: PMU with CPU voltage range above nominal is temporary + // accepted exception; for other limit violations: PMU maximum level + // for CPU is not high enough, or PMU core range does not include + // nominal core voltage, assert is fired inside NvRmPmuSetVoltage()) + NvRmPmuGetCapabilities(hRmDevice, CpuRailAddress, &cap); + NominalCpuMv = NV_MAX(NominalCpuMv, cap.MinMilliVolts); NvRmPmuSetVoltage(hRmDevice, CpuRailAddress, NominalCpuMv, NULL); } diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits.c b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits.c index 08e93fb28841..896159674634 100644 --- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits.c +++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits.c @@ -128,6 +128,8 @@ NvRmPrivClockLimitsInit(NvRmDeviceHandle hRmDevice) pShmoo = s_ChipFlavor.pSocShmoo; pHwLimits = &pShmoo->ScaledLimitsList[0]; pSKUedLimits = pShmoo->pSKUedLimits; + NvOsDebugPrintf("NVRM corner (%d, %d)\n", + s_ChipFlavor.corner, s_ChipFlavor.CpuCorner); NvOsMemset((void*)s_pClockScales, 0, sizeof(s_pClockScales)); NvOsMemset(s_ClockRangeLimits, 0, sizeof(s_ClockRangeLimits)); diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c b/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c index 7cd0abeb9ce6..38b68621cd3f 100644 --- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c +++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c @@ -2296,8 +2296,9 @@ void NvRmPrivDvsInit(void) (cap.StepMilliVolts <= NVRM_CORE_RESOLUTION_MV)); #if NVRM_DVS_ACCEPT_PMU_HIGH_CPU_MIN pDvs->MinCpuMv = NV_MAX(pDvs->MinCpuMv, cap.MinMilliVolts); - NV_ASSERT(pDvs->MinCpuMv <= pDvs->NominalCpuMv); + pDvs->NominalCpuMv = NV_MAX(pDvs->NominalCpuMv, pDvs->MinCpuMv); #else + NV_ASSERT(pDvs->MinCpuMv <= pDvs->NominalCpuMv); NV_ASSERT(cap.MinMilliVolts <= pDvs->MinCpuMv); #endif NV_ASSERT(cap.MaxMilliVolts >= pDvs->NominalCpuMv); |