diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-04-14 14:00:13 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-04-14 15:33:14 -0700 |
| commit | 038437e4e1975d9aec6a8385d52b24efac428289 (patch) | |
| tree | 378ec26d3e89552ccaaff9418b7b54c175871458 /arch | |
| parent | 283cec48bd3f48c988c61a460f4f2e125e18e80a (diff) | |
tegra RM: Disabled NOR clock.
Disabled NOR clock in RM ("orphan" boot clock). If/when NOR driver is
added it will re-enable it as necessary.
Change-Id: I5f9b15a5be86c594b6638c3110d9f1d8ba5db694
Reviewed-on: http://git-master/r/1116
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clocks.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clocks.c b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clocks.c index 494c371781d4..8351a096e773 100644 --- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clocks.c +++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clocks.c @@ -1168,6 +1168,9 @@ NvRmPrivAp20BasicReset( NvRmDeviceHandle rm ) CLK_ENB_BSEV, DISABLE, ClkOutH); ClkOutH = NV_FLD_SET_DRF_DEF(CLK_RST_CONTROLLER, CLK_OUT_ENB_H, CLK_ENB_BSEA, DISABLE, ClkOutH); + // Make sure SNOR clock will be kept disabled + ClkOutH = NV_FLD_SET_DRF_DEF(CLK_RST_CONTROLLER, CLK_OUT_ENB_H, + CLK_ENB_SNOR, DISABLE, ClkOutH); // restore clock enable state (= disable those clocks that // were disabled on boot) |