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authorMahesh Mahadevan <Mahesh.Mahadevan@freescale.com>2013-05-22 17:05:06 -0500
committerMahesh Mahadevan <Mahesh.Mahadevan@freescale.com>2013-05-23 09:05:34 -0500
commitd6f32393eaf455ce3c32d4e9bafd34d9091eaf45 (patch)
tree9786624f967969431da65ecaa7095bae4552e4df /arch
parentd72bb22ba2f382cebfe6e275e6c1a1c68d076281 (diff)
ENGR00263785 Update code to read GPIO signal value
The code reads the direction register and returns value from the DR register if pin is configured as output and from the PSR register if pin is configured as input. Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
Diffstat (limited to 'arch')
-rwxr-xr-xarch/arm/plat-mxc/gpio.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 82b70d537df9..e12aee5b093b 100755
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -3,7 +3,7 @@
* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
*
* Based on code from Freescale,
- * Copyright (C) 2004-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -283,8 +283,13 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct mxc_gpio_port *port =
container_of(chip, struct mxc_gpio_port, chip);
+ u32 gpio_direction;
- return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
+ gpio_direction = __raw_readl(port->base + GPIO_GDIR);
+ if (((gpio_direction >> offset) & 1)) /* output mode */
+ return (__raw_readl(port->base + GPIO_DR) >> offset) & 1;
+ else /* input mode */
+ return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
}
static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)