diff options
| author | Alex Frid <afrid@nvidia.com> | 2013-07-12 20:36:22 -0700 |
|---|---|---|
| committer | Harshada Kale <hkale@nvidia.com> | 2013-09-12 02:21:38 -0700 |
| commit | 925664091e7ff87df79f34dfa4d1ee5537bde70d (patch) | |
| tree | 11f1ad03d192bc9c9e42256b3fcfd338ac71f4fb /arch | |
| parent | 1e821c4257c85b8d2dddc3eb67ca1b61445f9eba (diff) | |
ARM: tegra11: dvfs: Don't throttle T40T nominal voltage
On T40T parts removed throttling of nominal voltage by boot core edp.
Used the latter to specify detached mode (boot, disable, suspend)
limits.
Change-Id: Ifa846ec8c7cb79df91b80cc81ffdef0f02a45372
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/250030
(cherry picked from commit 08f29bd004f440272fdf75bf198638e9aceb8424)
Reviewed-on: http://git-master/r/253670
Tested-by: Shaoming Feng <shaomingf@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_dvfs.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra11_dvfs.c b/arch/arm/mach-tegra/tegra11_dvfs.c index 072a9ade160f..7490d2bcd1b6 100644 --- a/arch/arm/mach-tegra/tegra11_dvfs.c +++ b/arch/arm/mach-tegra/tegra11_dvfs.c @@ -34,6 +34,8 @@ static bool tegra_dvfs_core_disabled; #define KHZ 1000 #define MHZ 1000000 +#define TEGRA11_CORE_VOLTAGE_CAP 1100 + /* FIXME: need tegra11 step */ #define VDD_SAFE_STEP 100 @@ -636,11 +638,23 @@ static int __init get_core_nominal_mv_index(int speedo_id) * Start with nominal level for the chips with this speedo_id. Then, * make sure core nominal voltage is below edp limit for the board * (if edp limit is set). + * + * Otherwise, leave nominal core voltage at chip bin level, and set + * all detach mode (boot, suspend, disable) limits same as boot edp + * (for now, still throttle nominal for other than T40T skus). */ + if (!core_edp_voltage) - core_edp_voltage = 1100; /* default 1.1V EDP limit */ + core_edp_voltage = TEGRA11_CORE_VOLTAGE_CAP; /* default 1.1V EDP limit */ + + if ((core_edp_voltage <= TEGRA11_CORE_VOLTAGE_CAP) || + (tegra_sku_id != 0x4)) + mv = min(mv, core_edp_voltage); - mv = min(mv, core_edp_voltage); + /* use boot edp limit as disable and suspend levels as well */ + tegra11_dvfs_rail_vdd_core.boot_millivolts = core_edp_voltage; + tegra11_dvfs_rail_vdd_core.suspend_millivolts = core_edp_voltage; + tegra11_dvfs_rail_vdd_core.disable_millivolts = core_edp_voltage; /* Round nominal level down to the nearest core scaling step */ for (i = 0; i < MAX_DVFS_FREQS; i++) { |