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authorKrzysztof Kozlowski <k.kozlowski@samsung.com>2015-02-27 05:50:41 +0900
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-26 13:59:50 +0100
commit8ba5046af4483289c78cbb5608e20f695b9a9465 (patch)
treec3f0def5af5479ad5f0aa7fd966f8f783630e8d9 /arch
parentfe9c9b2a4545e2ec3eea3369dbd8fccfccd40c44 (diff)
ARM: EXYNOS: Don't use LDREX and STREX after disabling cache coherency
commit ca489c58ef0b81cc9c9252fd92e6c9bb38d3c408 upstream. During CPU shutdown the exynos_cpu_power_down() is called after disabling cache coherency and it uses LDREX and STREX instructions (by calling of_machine_is_compatible() -> kobject_get() -> kref_get()). The LDREX and STREX should not be used after disabling the cache coherency so just use soc_is_exynos(). Fixes: adc548d77c22 ("ARM: EXYNOS: Use MCPM call-backs to support S2R on exynos5420") Reported-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kukjin Kim <kgene@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 7a1ebfeeeeb8..0abb7dff73ab 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
*/
void exynos_cpu_power_down(int cpu)
{
- if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") ||
- of_machine_is_compatible("samsung,exynos5800"))) {
+ if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
/*
* Bypass power down for CPU0 during suspend. Check for
* the SYS_PWR_REG value to decide if we are suspending