diff options
author | Alex Frid <afrid@nvidia.com> | 2010-04-08 21:08:14 -0700 |
---|---|---|
committer | Gary King <gking@nvidia.com> | 2010-04-12 21:30:25 -0700 |
commit | 7be266624f37e8a2d3783c405d19716f24ccc1b4 (patch) | |
tree | 3b5d1ffd6cb092d5135f0e1d94ce250ed1f68dc2 /arch | |
parent | fb32b775fd431c658942102a8e6b77c0cba28829 (diff) |
tegra RM: Reduced LP2 entry threshold.
Adjusted LP2 time padding factor to reduce LP2 entry threshold back to 5ms
(commit ad159fa937e9d917737956d12d530b723cba2b13 set it to 12.5ms as a side
effect of adding power good delay to LP2 turnaround time)
Change-Id: I1f00803e5d043cc6e99aeb7b373c0bdbda56e0ed
Reviewed-on: http://git-master/r/1087
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/idle-t2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/idle-t2.c b/arch/arm/mach-tegra/idle-t2.c index fa71134a58ca..14782d11ed8a 100644 --- a/arch/arm/mach-tegra/idle-t2.c +++ b/arch/arm/mach-tegra/idle-t2.c @@ -51,7 +51,7 @@ extern struct wake_lock main_wake_lock; #define CPU_CONTEXT_SAVE_AREA_SIZE 4096 #define TEMP_SAVE_AREA_SIZE 16 #define ENABLE_LP2 1 -#define LP2_PADDING_FACTOR 5 +#define LP2_PADDING_FACTOR 2 #define LP2_ROUNDTRIP_TIME_US 2500ul //Let Max LP2 time wait be 71 min (Almost a wrap around) #define LP2_MAX_WAIT_TIME_US (71*60*1000000ul) |