diff options
| author | Xinyu Chen <xinyu.chen@freescale.com> | 2010-03-30 15:46:10 +0800 |
|---|---|---|
| committer | Xinyu Chen <xinyu.chen@freescale.com> | 2010-03-30 15:58:37 +0800 |
| commit | eeb3bb9186ef5e16a1ebe92c7ffa6d46476ccf6d (patch) | |
| tree | f0121a76faed9eebf221234404d71468e37b412d /arch | |
| parent | 0fc366c8cf1190553ee5243e5c217e9697244aa6 (diff) | |
ENGR00122137 MX53 Add UART support for EVK APC
Add UART2/3 support for EVK Automotive Port Card.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx5/board-mx53_evk.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-mx5/mx53_evk_gpio.c | 18 |
2 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/board-mx53_evk.h b/arch/arm/mach-mx5/board-mx53_evk.h index 14d13827c7bd..76e12ce5b491 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.h +++ b/arch/arm/mach-mx5/board-mx53_evk.h @@ -75,10 +75,10 @@ /*! @} */ /* UART 2 configuration */ #define UART2_MODE MODE_DCE -#define UART2_IR IRDA +#define UART2_IR NO_IRDA #define UART2_ENABLED 1 /* UART 3 configuration */ -#define UART3_MODE MODE_DTE +#define UART3_MODE MODE_DCE #define UART3_IR NO_IRDA #define UART3_ENABLED 1 /* UART 4 configuration */ diff --git a/arch/arm/mach-mx5/mx53_evk_gpio.c b/arch/arm/mach-mx5/mx53_evk_gpio.c index 6108ade628b2..7ca8e77c3b0a 100644 --- a/arch/arm/mach-mx5/mx53_evk_gpio.c +++ b/arch/arm/mach-mx5/mx53_evk_gpio.c @@ -92,12 +92,22 @@ static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { }, { MX53_PIN_ATA_BUFFER_EN, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH3, }, { MX53_PIN_ATA_CS_0, IOMUX_CONFIG_ALT4, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), }, { MX53_PIN_ATA_CS_1, IOMUX_CONFIG_ALT4, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART3_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH3, }, { MX53_PIN_ATA_DA_1, IOMUX_CONFIG_GPIO, @@ -122,6 +132,10 @@ static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { }, { MX53_PIN_ATA_DIOR, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART2_IPP_UART_RTS_B_SELECT_INPUT, + INPUT_CTL_PATH3, }, { MX53_PIN_ATA_DIOW, IOMUX_CONFIG_ALT3, @@ -131,9 +145,13 @@ static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { }, { MX53_PIN_ATA_DMARQ, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), }, { MX53_PIN_ATA_INTRQ, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), }, { MX53_PIN_KEY_COL0, IOMUX_CONFIG_ALT2, |