diff options
author | Bai Ping <b51503@freescale.com> | 2015-06-19 01:34:19 +0800 |
---|---|---|
committer | Bai Ping <b51503@freescale.com> | 2015-07-22 18:24:13 +0800 |
commit | 3ad1f7690d4bc1cd3c89925da6a8274c9e49ecb7 (patch) | |
tree | ed38bf89f90c3932dd6006df152f2ca24aa5f798 /arch | |
parent | 00177b76f6db2859391310159d3f57f2d91a8057 (diff) |
MLK-11126 ARM: dts: imx: update the setpoints data on imx6ul
Updating the setpoint data on i.MX6UL According to the latest
datasheet(Rev. B, 04/2015). Additionally, we add a 25mV margin
to cover the board tolerence and IR drop.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 20b60a54ca413ff4183b895c247794f3f7626e69)
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts | 18 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 12 |
2 files changed, 24 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts index 2759643919ed..6619eaf53884 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts +++ b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts @@ -98,6 +98,24 @@ }; &cpu0 { + /* + * on i.MX6UL, no seperated VDD_ARM_IN and VDD_SOC_IN, + * to align with other platform and use the same cpufreq + * driver, still use the seperated OPP define for arm + * and soc. + */ + operating-points = < + /* kHz uV */ + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; + fsl,soc-operating-points = < + /* KHz uV */ + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; arm-supply = <&sw1a_reg>; soc-supply = <&sw1a_reg>; fsl,arm-soc-shared = <1>; diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index c9d51aed8682..72fb0047d272 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -56,15 +56,15 @@ clock-latency = <61036>; /* two CLK32 periods */ operating-points = < /* kHz uV */ - 528000 1250000 - 396000 1150000 - 198000 1150000 + 528000 1175000 + 396000 1025000 + 198000 950000 >; fsl,soc-operating-points = < /* KHz uV */ - 528000 1250000 - 396000 1150000 - 198000 1150000 + 528000 1175000 + 396000 1175000 + 198000 1175000 >; clocks = <&clks IMX6UL_CLK_ARM>, <&clks IMX6UL_CLK_PLL2_BUS>, |