diff options
| author | Anson Huang <b20788@freescale.com> | 2015-06-19 23:19:33 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2015-06-21 02:30:48 +0800 |
| commit | 5f76ac196fab896544983ef21dde12252fade6f0 (patch) | |
| tree | 3031cc96e2297ab773dd5f63edb80c3ddb39d190 /arch | |
| parent | ba47e9abbf355509aacaa14d4b904afd6c9e26a5 (diff) | |
MLK-11138 ARM: imx: correct AHB post div name for busfreq
Commit (913c520 MLK-11045: arm: imx: clk-imx7d:
remove ahb_root_clk LPCG clock gate) changes AHB clk's post
divider name from IMX7D_AHB_CHANNEL_ROOT_DIV to
IMX7D_AHB_CHANNEL_ROOT_CLK, busfreq needs to update
AHB clk name accordingly, otherwise, first time busfreq
enters low bus mode, AHB clk rate is 12MHz which is
incorrect, it should be 24MHz.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 8d6d3a17d7f6..95c40570d56f 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -313,7 +313,7 @@ <&clks IMX7D_DRAM_ROOT_SRC>, <&clks IMX7D_DRAM_ALT_ROOT_SRC>, <&clks IMX7D_PLL_DRAM_MAIN_CLK>, <&clks IMX7D_DRAM_ALT_ROOT_CLK>, <&clks IMX7D_PLL_SYS_PFD2_270M_CLK>, <&clks IMX7D_PLL_SYS_PFD1_332M_CLK>, - <&clks IMX7D_AHB_CHANNEL_ROOT_DIV>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>; + <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>; clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", "dram_alt_sel", "pll_dram", "dram_alt_root", "pfd2_270m", "pfd1_332m", "ahb", "axi"; interrupts = <0 112 0x04>, <0 113 0x04>; |