diff options
| author | Jon Mayo <jmayo@nvidia.com> | 2010-08-26 16:25:47 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-08-27 10:53:20 -0700 |
| commit | 72c8f3a64b53539d1c209cc32d1b33d9c7e855d0 (patch) | |
| tree | cf027c3f7e1e806f5fc839062d4712aa7105e4de /arch | |
| parent | af484bc46cfb2f8eefa8f738a3060bedb1cafded (diff) | |
[tegra/arm] use no allocate on write for caching
Changes NMRR (normal memory remap register) to use write-back, no allocate
on write for cacheable(C-bit) and bufferable(B-bit) pages. Originally it was
set to write-back, allocate on write.
Bug 722162
Change-Id: Idb04e86e902c06b5c1721907d93d63c7bb281b5b
Reviewed-on: http://git-master/r/5666
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/cortex-a9.S | 2 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S index 9edabaa60c7d..b3ae14977653 100644 --- a/arch/arm/mach-tegra/cortex-a9.S +++ b/arch/arm/mach-tegra/cortex-a9.S @@ -662,7 +662,7 @@ ENTRY(__return_to_virtual) mcr p15, 0, r0, c3, c0, 0 @ domain access register mov32 r0, 0xff0a89a8 - mov32 r1, 0x40e044e0 + mov32 r1, 0xc0e0c4e0 mcr p15, 0, r0, c10, c2, 0 @ PRRR mcr p15, 0, r1, c10, c2, 1 @ NMRR mrc p15, 0, r0, c1, c0, 0 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index fa2132949a79..1a2dd7f8057a 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -271,7 +271,7 @@ __v7_setup: * NOS = PRRR[24+n] = 1 - not outer shareable */ ldr r5, =0xff0a89a8 - ldr r6, =0x40e044e0 + ldr r6, =0xc0e0c4e0 mcr p15, 0, r5, c10, c2, 0 @ write PRRR mcr p15, 0, r6, c10, c2, 1 @ write NMRR #endif |