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authorCharlie Huang <chahuang@nvidia.com>2011-09-01 16:18:17 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-09-14 14:33:48 -0700
commit1a5733cc93dc9ec0eabe6115038567d3cf48a61a (patch)
treefd6b3ae22aa413fd59f0b1891bf397fd99a30ba3 /arch
parent0fa05e9904f369e201cad0c9be2b15e141d3624e (diff)
arm: tegra: cardhu: change vi pll src to pll_p
Change the pll source of vi_sensor from PLL_M to PLL_P since PLL_M is more variable. Also we can get exactly 24MHz mclk rather than 24.24MHz. Bug 870687 Change-Id: Idd754aea5486e26b7391dbdb397cb4f2116cc4e7 Reviewed-on: http://git-master/r/51677 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/board-cardhu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c
index 8374a9303d49..581b2bf92dcf 100644
--- a/arch/arm/mach-tegra/board-cardhu.c
+++ b/arch/arm/mach-tegra/board-cardhu.c
@@ -207,6 +207,7 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
{ "pll_a", NULL, 552960000, false},
{ "pll_a_out0", NULL, 12288000, false},
{ "d_audio", "pll_a_out0", 12288000, false},
+ { "vi_sensor", "pll_p", 150000000, false},
{ NULL, NULL, 0, 0},
};