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| author | Rebecca Schultz Zavin <rebecca@android.com> | 2011-04-22 15:54:34 -0700 |
|---|---|---|
| committer | Rebecca Schultz Zavin <rebecca@android.com> | 2011-04-22 15:54:34 -0700 |
| commit | 2e35e1d7b965893e68f2fb1af77129406be5ff05 (patch) | |
| tree | 4133e079309e275c0aaf96461bdda21d44c59038 /arch | |
| parent | 882113dbcbe92bca8fe08f67791e9b18d38a3fd3 (diff) | |
| parent | 438f97f7bd3127a95174ee8c36c6826bd9ba11ea (diff) | |
Merge remote branch 'common/android-2.6.36' into android-tegra-2.6.36
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 10 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 10 |
2 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0a293ee4a313..cd2c427f0e2b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1129,16 +1129,6 @@ config ARM_ERRATA_743622 visible impact on the overall performance or power consumption of the processor. -config ARM_ERRATA_720791 - bool "ARM errata: Dynamic high-level clock gating corrupts the Jazelle instruction stream" - depends on CPU_V7 - help - This option enables the workaround for the 720791 Cortex-A9 - (r1p0..r1p2) erratum. The Jazelle instruction stream may be - corrupted when dynamic high-level clock gating is enabled. - This workaround disables gating the Core clock when the Instruction - side is waiting for a Page Table Walk answer or linefill completion. - endmenu source "arch/arm/common/Kconfig" diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index de77d5b4271a..8cdf3bf26719 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -238,16 +238,6 @@ __v7_setup: 2: ldr r10, =0x00000c09 @ Cortex-A9 primary part number teq r0, r10 bne 3f - cmp r6, #0x10 @ power ctrl reg added r1p0 - mrcge p15, 0, r10, c15, c0, 0 @ read power control register - orrge r10, r10, #1 @ enable dynamic clock gating - mcrge p15, 0, r10, c15, c0, 0 @ write power control register -#ifdef CONFIG_ARM_ERRATA_720791 - teq r5, #0x00100000 @ only present in r1p* - mrceq p15, 0, r10, c15, c0, 2 @ read "chicken power ctrl" reg - orreq r10, r10, #0x30 @ disable core clk gate on - mcreq p15, 0, r10, c15, c0, 2 @ instr-side waits -#endif #ifdef CONFIG_ARM_ERRATA_742230 cmp r6, #0x22 @ only present up to r2p2 mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register |