ARM:tegra:tn7cw: USB eye diagram calibration

USB host/device mode eye diagram calibration
host mode using +3 offset for XCVR setup parameter.
device wiht no offset adjustment, but set bit[7:6]
into 01 for slew rate calibration.

Bug 1457966
Bug 1459798
Bug 200010446

Change-Id: Ieae4607d4bc51fa3aa83197318eaec04fd941a8f
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/421423

2 files changed, 46 insertions, 8 deletions

diff --git a/arch/arm/mach-tegra/board-tegratab.c b/arch/arm/mach-tegra/board-tegratab.c
index 14eb5b61e2c7..5af74a92aa56 100644
--- a/arch/arm/mach-tegra/board-tegratab.c
+++ b/arch/arm/mach-tegra/board-tegratab.c
@@ -501,6 +501,36 @@ static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
 	},
 };
 
+static struct tegra_usb_platform_data tegra_p1988_ehci1_utmi_pdata = {
+	.port_otg = true,
+	.has_hostpc = true,
+	.support_pmu_vbus = true,
+	.id_det_type = TEGRA_USB_PMU_ID,
+	.unaligned_dma_buf_supported = false,
+	.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
+	.op_mode = TEGRA_USB_OPMODE_HOST,
+	.u_data.host = {
+		.vbus_gpio = -1,
+		.hot_plug = false,
+		.remote_wakeup_supported = true,
+		.power_off_on_suspend = true,
+		.turn_off_vbus_on_lp0 = true,
+	},
+	.u_cfg.utmi = {
+		.hssync_start_delay = 0,
+		.elastic_limit = 16,
+		.idle_wait_delay = 17,
+		.term_range_adj = 6,
+		.xcvr_setup = 15,
+		.xcvr_lsfslew = 2,
+		.xcvr_lsrslew = 2,
+		.xcvr_setup_offset = -2,
+		.xcvr_use_fuses = 1,
+		.vbus_oc_map = 0x4,
+		.xcvr_hsslew_lsb = 3,
+	},
+};
+
 static struct tegra_usb_otg_data tegra_otg_pdata = {
 	.ehci_device = &tegra_ehci1_device,
 	.ehci_pdata = &tegra_ehci1_utmi_pdata,
@@ -511,6 +541,11 @@ static struct tegra_usb_otg_data tegra_otg_pdata = {
 static void tegratab_usb_init(void)
 {
 	int usb_port_owner_info = tegra_get_usb_port_owner_info();
+	struct board_info board_info;
+
+	tegra_get_board_info(&board_info);
+	if (board_info.board_id == BOARD_P1988)
+		tegra_otg_pdata.ehci_pdata = &tegra_p1988_ehci1_utmi_pdata;
 
 	/* Set USB wake sources for tegratab */
 	tegra_set_usb_wake_source();
diff --git a/arch/arm/mach-tegra/tegra11x_usb_phy.c b/arch/arm/mach-tegra/tegra11x_usb_phy.c
index 7ed193e07582..c37d5b6ed83d 100644
--- a/arch/arm/mach-tegra/tegra11x_usb_phy.c
+++ b/arch/arm/mach-tegra/tegra11x_usb_phy.c
@@ -37,6 +37,9 @@
 #include "tegra_usb_phy.h"
 #include "gpio-names.h"
 #include "fuse.h"
+#include "board.h"
+#include "board-common.h"
+#include "tegra-board-id.h"
 
 #define USB_USBCMD		0x130
 #define   USB_USBCMD_RS		(1 << 0)
@@ -144,9 +147,7 @@
 #define   UTMIP_XCVR_SETUP_MSB(x)		(((x) & 0x7) << 22)
 #define   UTMIP_XCVR_HSSLEW_MSB(x)		(((x) & 0x7f) << 25)
 #define   UTMIP_XCVR_HSSLEW_LSB(x)		(((x) & 0x3) << 4)
-#ifdef CONFIG_MACH_TEGRANOTE7C
 #define	  UTMIP_XCVR_DEV_SLEW(x)		(((x) & 0x3) << 6)
-#endif
 #define   UTMIP_XCVR_MAX_OFFSET		2
 #define   UTMIP_XCVR_SETUP_MAX_VALUE	0x7f
 #define   UTMIP_XCVR_SETUP_MIN_VALUE	0
@@ -954,6 +955,8 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
 #endif
 	struct tegra_utmi_config *config = &phy->pdata->u_cfg.utmi;
 	struct tegra_usb_pmc_data *pmc = &pmc_data[phy->inst];
+	struct board_info board_info;
+	tegra_get_board_info(&board_info);
 
 	PHY_DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
 	if (phy->phy_clk_on) {
@@ -1027,13 +1030,13 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
 	if (config->xcvr_hsslew_lsb)
 		val |= UTMIP_XCVR_HSSLEW_LSB(config->xcvr_hsslew_lsb);
 
-#ifdef CONFIG_MACH_TEGRANOTE7C
-	/* device mode */
-	if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
-		val &= ~(UTMIP_XCVR_DEV_SLEW(~0));
-		val |= UTMIP_XCVR_DEV_SLEW(0x01);
+	if (board_info.board_id == BOARD_P1988) {
+		/* device mode */
+		if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
+			val &= ~(UTMIP_XCVR_DEV_SLEW(~0));
+			val |= UTMIP_XCVR_DEV_SLEW(0x01);
+		}
 	}
-#endif
 	writel(val, base + UTMIP_XCVR_CFG0);
 
 	val = readl(base + UTMIP_XCVR_CFG1);