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authorRoger Quadros <rogerq@ti.com>2014-09-02 16:57:05 +0300
committerTony Lindgren <tony@atomide.com>2014-09-04 12:39:15 -0700
commite47acd9626ec8cc0292fd54e2bc50fae12cf4188 (patch)
tree301c2bbb24d691458d30f88a946c59945822b3b9 /arch
parent302946dee9542718ea347b70fbf3bc90081e00e9 (diff)
ARM: dts: am43xx-epos-evm: Don't use read/write wait monitoring
NAND uses wait pin only to indicate device readiness after a block/page operation. It is not use to extend individual read/write cycle and so read/write wait pin monitoring must be disabled for NAND. Add gpmc wait pin information as the NAND uses wait pin 0 for device ready indication. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Pekon Gupta <pekon@pek-sem.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index f6c98985b5c7..b489b278f184 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -459,8 +459,7 @@
gpmc,access-ns = <30>; /* tCEA + 4*/
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
+ gpmc,wait-pin = <0>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;