diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-10-08 23:03:42 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2010-10-19 17:10:34 -0700 |
| commit | b3c5b3ae3c492dcfc49dc1a7265b801398565d3b (patch) | |
| tree | 842b59141091f826fb6fb00ecea9dbb8dd0e1bad /arch | |
| parent | d4d4296df579488a0df39266ce43b5b5c61d7b5d (diff) | |
[ARM/tegra] clocks: Enabled clock before set rate.
Made sure graphics and sdhci clocks are enabled before the respective
rate is configured.
Change-Id: I2d09ad111321b296a8d8fbb2d4bff02016e12feb
Reviewed-on: http://git-master/r/8272
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c b/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c index b6ab9339af28..b9c1c87f3297 100644 --- a/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c +++ b/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c @@ -600,6 +600,8 @@ ExecPlatform NvRmPrivGetExecPlatform(NvRmDeviceHandle hRmDeviceHandle) /*****************************************************************************/ +#define NVRM_DEBUG_MODULE_CLOCK_SET (1) + /* Sets module clock source/divider register */ void NvRmPrivModuleClockSet( NvRmDeviceHandle hDevice, @@ -608,6 +610,16 @@ void NvRmPrivModuleClockSet( { NvU32 reg, divisor; +#if NVRM_DEBUG_MODULE_CLOCK_SET + if(cinfo->ClkEnableOffset != 0) + { + reg = NV_REGR(hDevice, + NvRmPrivModuleID_ClockAndReset, 0, cinfo->ClkEnableOffset); + if ((reg & cinfo->ClkEnableField) != cinfo->ClkEnableField) + NvOsDebugPrintf("tegra: configuring disabled clock ( module %d, " + "instance %d )\n", cinfo->Module, cinfo->Instance); + } +#endif NV_ASSERT(cinfo->ClkSourceOffset); reg = NV_REGR(hDevice, NvRmPrivModuleID_ClockAndReset, 0, cinfo->ClkSourceOffset); divisor = (reg >> cinfo->DivisorFieldShift) & cinfo->DivisorFieldMask; |