diff options
| author | Huacai Chen <chenhc@lemote.com> | 2015-03-29 10:54:05 +0800 |
|---|---|---|
| committer | Zefan Li <lizefan@huawei.com> | 2015-09-18 09:20:28 +0800 |
| commit | b645f1d3617f056019c9f0bcf65e9aebdabc7e56 (patch) | |
| tree | 7d9910d458eaa6b66fb5a8fd6cccab5e15e0793b /arch | |
| parent | 4ba8f6690e4527d237f05f9f0e949add2742a796 (diff) | |
MIPS: Hibernate: flush TLB entries earlier
commit a843d00d038b11267279e3b5388222320f9ddc1d upstream.
We found that TLB mismatch not only happens after kernel resume, but
also happens during snapshot restore. So move it to the beginning of
swsusp_arch_suspend().
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9621/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Zefan Li <lizefan@huawei.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/power/hibernate.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S index 5bf34ec89669..2ca17353fc0c 100644 --- a/arch/mips/power/hibernate.S +++ b/arch/mips/power/hibernate.S @@ -31,6 +31,8 @@ LEAF(swsusp_arch_suspend) END(swsusp_arch_suspend) LEAF(swsusp_arch_resume) + /* Avoid TLB mismatch during and after kernel resume */ + jal local_flush_tlb_all PTR_L t0, restore_pblist 0: PTR_L t1, PBE_ADDRESS(t0) /* source */ @@ -44,7 +46,6 @@ LEAF(swsusp_arch_resume) bne t1, t3, 1b PTR_L t0, PBE_NEXT(t0) bnez t0, 0b - jal local_flush_tlb_all /* Avoid TLB mismatch after kernel resume */ PTR_LA t0, saved_regs PTR_L ra, PT_R31(t0) PTR_L sp, PT_R29(t0) |