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authorAlex Frid <afrid@nvidia.com>2011-11-08 22:06:32 -0800
committerVarun Colbert <vcolbert@nvidia.com>2011-11-15 11:52:15 -0800
commit92cd5c809536e4c7c8a30b08d033346bb4f147a3 (patch)
tree9d0b9dbbc9ebe008189475255cda473eb720489b /arch
parent40243988e73a13a5c94db410cb0335fa8a9b1e42 (diff)
ARM: tegra: clock: Return shared_bus_set_rate() errors
Returned error code from Tegra3 shared_bus_set_rate(). (cherry picked from commit b9aea1656af4d3e17433c82611fe5e7146a41733) Change-Id: Ib3706c61dc911d7bb876f1ddafe52474f79591ec Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/63978 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/tegra3_clocks.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c
index ee2d25d8dc41..1e9052a86ac5 100644
--- a/arch/arm/mach-tegra/tegra3_clocks.c
+++ b/arch/arm/mach-tegra/tegra3_clocks.c
@@ -2675,23 +2675,22 @@ static struct clk_ops tegra_clk_cbus_ops = {
* shared bus.
*/
-static void shared_bus_set_rate(struct clk *bus,
- unsigned long rate, unsigned long old_rate)
+static noinline int shared_bus_set_rate(struct clk *bus, unsigned long rate,
+ unsigned long old_rate)
{
int ret, mv, old_mv;
unsigned long bridge_rate = emc_bridge->u.shared_bus_user.rate;
/* If bridge is not needed (LPDDR2) just set bus rate */
- if (bridge_rate < TEGRA_EMC_BRIDGE_RATE_MIN) {
- clk_set_rate_locked(bus, rate);
- return;
- }
+ if (tegra_emc_get_dram_type() == DRAM_TYPE_LPDDR2)
+ return clk_set_rate_locked(bus, rate);
mv = tegra_dvfs_predict_millivolts(bus, rate);
old_mv = tegra_dvfs_predict_millivolts(bus, old_rate);
if (IS_ERR_VALUE(mv) || IS_ERR_VALUE(old_mv)) {
pr_err("%s: Failed to predict %s voltage for %lu => %lu\n",
__func__, bus->name, old_rate, rate);
+ return -EINVAL;
}
/* emc bus: set bridge rate as intermediate step when crossing
@@ -2706,11 +2705,10 @@ static void shared_bus_set_rate(struct clk *bus,
if (ret) {
pr_err("%s: Failed to set emc bridge rate %lu\n",
__func__, bridge_rate);
- return;
+ return ret;
}
}
- clk_set_rate_locked(bus, rate);
- return;
+ return clk_set_rate_locked(bus, rate);
}
/* sbus and cbus: enable/disable emc bridge user when crossing voltage
@@ -2722,15 +2720,19 @@ static void shared_bus_set_rate(struct clk *bus,
ret = clk_enable(emc_bridge);
if (ret) {
pr_err("%s: Failed to enable emc bridge\n", __func__);
- return;
+ return ret;
}
}
- clk_set_rate_locked(bus, rate);
+ ret = clk_set_rate_locked(bus, rate);
+ if (ret)
+ return ret;
if ((mv <= TEGRA_EMC_BRIDGE_MVOLTS_MIN) &&
(old_mv > TEGRA_EMC_BRIDGE_MVOLTS_MIN))
clk_disable(emc_bridge);
+
+ return 0;
}
static void tegra3_clk_shared_bus_update(struct clk *bus)