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authorSudeep Holla <sudeep.holla@arm.com>2015-03-17 17:28:46 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-05-06 22:03:43 +0200
commite654ded279c44285d07a31fe6d6c6fb74a9b5465 (patch)
tree13421865956afd2db4e80e2670e7f41bf4f6e541 /drivers/base
parenta3ec48fa3f64ea293bfe691a02c17c0a7d2887e1 (diff)
drivers/base: cacheinfo: validate device node for all the caches
commit 8a7d95f95c95f396decbd4cda6d4903fc4664946 upstream. On architectures that depend on DT for obtaining cache hierarcy, we need to validate the device node for all the cache indices, failing to do so might result in wrong information being exposed to the userspace. This is quite possible on initial/incomplete versions of the device trees. In such cases, it's better to bail out if all the required device nodes are not present. This patch adds checks for the validation of device node for all the caches and doesn't initialise the cacheinfo if there's any error. Reported-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/base')
-rw-r--r--drivers/base/cacheinfo.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 6e64563361f0..9c2ba1c97c42 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -62,15 +62,21 @@ static int cache_setup_of_node(unsigned int cpu)
return -ENOENT;
}
- while (np && index < cache_leaves(cpu)) {
+ while (index < cache_leaves(cpu)) {
this_leaf = this_cpu_ci->info_list + index;
if (this_leaf->level != 1)
np = of_find_next_cache_node(np);
else
np = of_node_get(np);/* cpu node itself */
+ if (!np)
+ break;
this_leaf->of_node = np;
index++;
}
+
+ if (index != cache_leaves(cpu)) /* not all OF nodes populated */
+ return -ENOENT;
+
return 0;
}
@@ -189,8 +195,11 @@ static int detect_cache_attributes(unsigned int cpu)
* will be set up here only if they are not populated already
*/
ret = cache_shared_cpu_map_setup(cpu);
- if (ret)
+ if (ret) {
+ pr_warn("Unable to detect cache hierarcy from DT for CPU %d\n",
+ cpu);
goto free_ci;
+ }
return 0;
free_ci: