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authorDave Airlie <airlied@linux.ie>2006-08-19 17:43:52 +1000
committerDave Airlie <airlied@linux.ie>2006-09-22 05:32:33 +1000
commitb15ec36806ce3b89a2fddce958de9370efb249da (patch)
treea7c027ffd411eb719123aec77c69355cdf4aded2 /drivers/char/drm/radeon_drv.h
parentd40c8533a5b8ca1887f81ae1c81136f3c40a8488 (diff)
drm: realign sosme radeon code with drm git tree
this applies some minor cleanups for the radeon driver, to use the 3D flush and reset the AGP flags on X recycle Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_drv.h')
-rw-r--r--drivers/char/drm/radeon_drv.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index 2f51d5147730..40f1dde6b1bb 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -142,6 +142,7 @@ enum radeon_chip_flags {
CHIP_HAS_HIERZ = 0x00100000UL,
CHIP_IS_PCIE = 0x00200000UL,
CHIP_NEW_MEMMAP = 0x00400000UL,
+ CHIP_IS_PCI = 0x00800000UL,
};
#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
@@ -993,12 +994,12 @@ do { \
#define RADEON_FLUSH_CACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \
- OUT_RING( RADEON_RB2D_DC_FLUSH ); \
+ OUT_RING( RADEON_RB3D_DC_FLUSH ); \
} while (0)
#define RADEON_PURGE_CACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \
- OUT_RING( RADEON_RB2D_DC_FLUSH_ALL ); \
+ OUT_RING( RADEON_RB3D_DC_FLUSH_ALL ); \
} while (0)
#define RADEON_FLUSH_ZCACHE() do { \