diff options
| author | Igor Opaniuk <igor.opaniuk@toradex.com> | 2020-11-17 14:38:38 +0200 |
|---|---|---|
| committer | Igor Opaniuk <igor.opaniuk@toradex.com> | 2020-11-17 14:38:38 +0200 |
| commit | 8bb9d758833ea1d0622277981b5225980ba0a42d (patch) | |
| tree | 2281499b2970e563f522db7ebc9d03bebfda4bfa /drivers/clk/socfpga/clk-pll-s10.c | |
| parent | 0316046d152a1817bd0b4faff8e34c212a936a5e (diff) | |
| parent | 3b59d4725be760cd276094079b4fbe7bd44e1464 (diff) | |
Merge branch 'toradex_5.4-2.1.x-imx' into HEAD
Diffstat (limited to 'drivers/clk/socfpga/clk-pll-s10.c')
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index 4705eb544f01..8d7b1d0c4664 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -39,7 +39,9 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, /* read VCO1 reg for numerator and denominator */ reg = readl(socfpgaclk->hw.reg); refdiv = (reg & SOCFPGA_PLL_REFDIV_MASK) >> SOCFPGA_PLL_REFDIV_SHIFT; - vco_freq = (unsigned long long)parent_rate / refdiv; + + vco_freq = parent_rate; + do_div(vco_freq, refdiv); /* Read mdiv and fdiv from the fdbck register */ reg = readl(socfpgaclk->hw.reg + 0x4); |