diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2018-11-13 16:46:08 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-12-17 20:37:40 +0100 |
| commit | 5a6e4cbc18bb7ee5cff1aafd38965444ff84157a (patch) | |
| tree | 92478f24825cbc1a11a4ae4ac1b27921ec9a8088 /drivers/clk/sunxi-ng/ccu-sun50i-a64.c | |
| parent | 202d886f7eb77192d337f5ff982de69845edc424 (diff) | |
clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
[ Upstream commit ee678706e46d0d185c27cc214ad97828e0643159 ]
DSI DPHY gate bit on MIPI DSI clock register is bit 15
not bit 30.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu-sun50i-a64.c')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 36a30a3cfad7..eaafc038368f 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -565,7 +565,7 @@ static const char * const dsi_dphy_parents[] = { "pll-video0", "pll-periph0" }; static const u8 dsi_dphy_table[] = { 0, 2, }; static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy", dsi_dphy_parents, dsi_dphy_table, - 0x168, 0, 4, 8, 2, BIT(31), CLK_SET_RATE_PARENT); + 0x168, 0, 4, 8, 2, BIT(15), CLK_SET_RATE_PARENT); static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu", 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT); |