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authorTom Lendacky <thomas.lendacky@amd.com>2014-07-10 10:58:35 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2014-07-23 21:28:38 +0800
commit126ae9adc1ec8d9006542f1a5e474b0183845e21 (patch)
treef3ee814b261aa440feae1b5785f797aaa16cced7 /drivers/crypto/ccp/ccp-dev.h
parent96956aef2ff5521af44d6cb896c967d025360ead (diff)
crypto: ccp - Base AXI DMA cache settings on device tree
The default cache operations for ARM64 were changed during 3.15. To use coherent operations a "dma-coherent" device tree property is required. If that property is not present in the device tree node then the non-coherent operations are assigned for the device. Add support to the ccp driver to assign the AXI DMA cache settings based on whether the "dma-coherent" property is present in the device node. If present, use settings that work with the caches. If not present, use settings that do not look at the caches. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccp/ccp-dev.h')
-rw-r--r--drivers/crypto/ccp/ccp-dev.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index 1c5651b09506..62ff35a6b9ec 100644
--- a/drivers/crypto/ccp/ccp-dev.h
+++ b/drivers/crypto/ccp/ccp-dev.h
@@ -30,6 +30,7 @@
#define TRNG_RETRIES 10
+#define CACHE_NONE 0x00
#define CACHE_WB_NO_ALLOC 0xb7
@@ -255,6 +256,9 @@ struct ccp_device {
/* Suspend support */
unsigned int suspending;
wait_queue_head_t suspend_queue;
+
+ /* DMA caching attribute support */
+ unsigned int axcache;
};