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authorHaojian Zhuang <haojian.zhuang@marvell.com>2011-10-14 16:44:07 +0800
committerHaojian Zhuang <haojian.zhuang@marvell.com>2011-11-14 21:07:59 +0800
commit478e223cc39ee98f9f9f0c87cb971a2fe0ce8d12 (patch)
tree1c0dde3d14ddb0997f5cbaf387d46ae879d94887 /drivers/gpio/gpio-pxa.c
parent4929f5a8a99f64378659c5658621e45c90c2aaa9 (diff)
ARM: pxa: recognize gpio number and type
Use cpuid to recognize the gpio number and type. CPU_PXA26x is the special case since we can't identify it by cpuid. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Diffstat (limited to 'drivers/gpio/gpio-pxa.c')
-rw-r--r--drivers/gpio/gpio-pxa.c41
1 files changed, 40 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 3e76c588f080..aebc4e8b7fd1 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -347,12 +347,51 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.irq_set_type = pxa_gpio_irq_type,
};
+static int pxa_gpio_nums(void)
+{
+ int count = 0;
+
+#ifdef CONFIG_ARCH_PXA
+ if (cpu_is_pxa25x()) {
+#ifdef CONFIG_CPU_PXA26x
+ count = 89;
+ gpio_type = PXA26X_GPIO;
+#elif defined(CONFIG_PXA25x)
+ count = 84;
+ gpio_type = PXA26X_GPIO;
+#endif /* CONFIG_CPU_PXA26x */
+ } else if (cpu_is_pxa27x()) {
+ count = 120;
+ gpio_type = PXA27X_GPIO;
+ } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
+ count = 191;
+ gpio_type = PXA93X_GPIO;
+ } else if (cpu_is_pxa3xx()) {
+ count = 127;
+ gpio_type = PXA3XX_GPIO;
+ }
+#endif /* CONFIG_ARCH_PXA */
+
+#ifdef CONFIG_ARCH_MMP
+ if (cpu_is_pxa168() || cpu_is_pxa910()) {
+ count = 127;
+ gpio_type = MMP_GPIO;
+ } else if (cpu_is_mmp2()) {
+ count = 191;
+ gpio_type = MMP2_GPIO;
+ }
+#endif /* CONFIG_ARCH_MMP */
+ return count;
+}
+
void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
{
struct pxa_gpio_chip *c;
int gpio, irq;
- pxa_last_gpio = end;
+ pxa_last_gpio = pxa_gpio_nums();
+ if (!pxa_last_gpio)
+ return;
/* Initialize GPIO chips */
pxa_init_gpio_chip(end);