diff options
| author | Charlene Liu <charlene.liu@amd.com> | 2019-05-08 13:29:09 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:12 -0500 |
| commit | c3ec8ba5377994251e83893aa8820f771ff4aabf (patch) | |
| tree | 20c9ae541f38a2c4ba86e837708e5a0f9fc093ae /drivers/gpu/drm/amd/display/dc/core | |
| parent | ba32c50f04466463258546a8e75ff8ddd6776bd5 (diff) | |
drm/amd/display: Return UPDATE_TYPE_FULL on writeback update
Should do full update when display writeback is updated.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Duke Du <Duke.Du@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 4 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index fd955151132f..8cecd58653cf 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1516,6 +1516,11 @@ static enum surface_update_type check_update_surfaces_for_stream( if (stream_update->dpms_off) return UPDATE_TYPE_FULL; + +#if defined(CONFIG_DRM_AMD_DC_DCN2_0) + if (stream_update->wb_update) + return UPDATE_TYPE_FULL; +#endif } for (i = 0 ; i < surface_count; i++) { diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index 3787398f6d80..30a25e694da0 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -373,6 +373,7 @@ bool dc_stream_add_writeback(struct dc *dc, { bool isDrc = false; int i = 0; + struct dwbc *dwb; if (stream == NULL) { dm_error("DC: dc_stream is NULL!\n"); @@ -391,7 +392,8 @@ bool dc_stream_add_writeback(struct dc *dc, wb_info->dwb_params.out_transfer_func = stream->out_transfer_func; - + dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; + dwb->dwb_is_drc = false; /* recalculate and apply DML parameters */ |