diff options
| author | Madhav Chauhan <madhav.chauhan@intel.com> | 2018-07-05 19:19:34 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2018-07-06 12:14:15 +0300 |
| commit | 21652f3b0d48749e3ba0d332d2b39cc18eacb1c0 (patch) | |
| tree | b9e4cbf606c743ef4eaf167a38b8417a245eec10 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | fcfe0bdcb1911a4ff6ab6b6264e3323745178025 (diff) | |
drm/i915/icl: Define DSI mode ctl register
This patch defines DSI IO mode control register and it's bits
used while enabling IO power for DSI.
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-4-git-send-email-madhav.chauhan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a35f4142cced..eb3b7544a875 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9688,6 +9688,14 @@ enum skl_power_gate { #define _BXT_MIPIC_PORT_CTRL 0x6B8C0 #define BXT_MIPI_PORT_CTRL(tc) _MMIO_MIPI(tc, _BXT_MIPIA_PORT_CTRL, _BXT_MIPIC_PORT_CTRL) +/* ICL DSI MODE control */ +#define _ICL_DSI_IO_MODECTL_0 0x6B094 +#define _ICL_DSI_IO_MODECTL_1 0x6B894 +#define ICL_DSI_IO_MODECTL(port) _MMIO_PORT(port, \ + _ICL_DSI_IO_MODECTL_0, \ + _ICL_DSI_IO_MODECTL_1) +#define COMBO_PHY_MODE_DSI (1 << 0) + #define BXT_P_DSI_REGULATOR_CFG _MMIO(0x160020) #define STAP_SELECT (1 << 0) |