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authorDaniel Vetter <daniel.vetter@ffwll.ch>2016-06-16 14:18:30 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2016-06-16 14:18:30 +0200
commitc19941218c9a1cae578dfbf30190b13b9cdb9aa8 (patch)
tree0014d2ac89e6209c565f5a8fc53abd8dce13e63e /drivers/gpu/drm/i915/i915_reg.h
parent1c1a24d2db35d9e1b6d2a012a7d51af8be8011ac (diff)
parenta0877f52035280370707bdefeddc6faa6478b892 (diff)
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
Backmerge drm-next to get at the nonblocking atomic helpers, needed to merge the i915 conversion. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8a729c95e80e..d229a83ad70a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -894,7 +894,7 @@ enum skl_disp_power_wells {
* PLLs can be routed to any transcoder A/B/C.
*
* Note: DDI0 is digital port B, DD1 is digital port C, and DDI2 is
- * digital port D (CHV) or port A (BXT).
+ * digital port D (CHV) or port A (BXT). ::
*
*
* Dual channel PHY (VLV/CHV/BXT)