diff options
author | Robert Chiras <robert.chiras@nxp.com> | 2019-08-13 16:59:49 +0300 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:58:59 +0800 |
commit | fbb37b19074442dea9aca28544e2f1ace7d53faa (patch) | |
tree | 6078d16817eb242c93330737d3be02bfbc647595 /drivers/gpu/drm/mxsfb/mxsfb_crtc.c | |
parent | 2242682d7076ee2830afbba49d61b50c223aafa3 (diff) |
drm/mxsfb: Reset vital registers for a proper initialization
Some of the registers, like LCDC_CTRL, CTRL2_OUTSTANDING_REQS and
CTRL1_RECOVERY_ON_UNDERFLOW needs to be properly cleared/initialized
for a better start and stop routine.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Diffstat (limited to 'drivers/gpu/drm/mxsfb/mxsfb_crtc.c')
-rw-r--r-- | drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index b69ace8bf526..5e44f57b1458 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -127,6 +127,10 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) clk_prepare_enable(mxsfb->clk_disp_axi); clk_prepare_enable(mxsfb->clk); + if (mxsfb->devdata->ipversion >= 4) + writel(CTRL2_OUTSTANDING_REQS(REQ_16), + mxsfb->base + LCDC_V4_CTRL2 + REG_SET); + /* If it was disabled, re-enable the mode again */ writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); @@ -136,12 +140,19 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) writel(reg, mxsfb->base + LCDC_VDCTRL4); writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET); + writel(CTRL1_RECOVERY_ON_UNDERFLOW, mxsfb->base + LCDC_CTRL1 + REG_SET); } static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) { u32 reg; + if (mxsfb->devdata->ipversion >= 4) + writel(CTRL2_OUTSTANDING_REQS(0x7), + mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); + + writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR); + /* * Even if we disable the controller here, it will still continue * until its FIFOs are running out of data @@ -295,6 +306,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) dma_addr_t paddr; mxsfb_enable_axi_clk(mxsfb); + writel(0, mxsfb->base + LCDC_CTRL); mxsfb_crtc_mode_set_nofb(mxsfb); /* Write cur_buf as well to avoid an initial corrupt frame */ |