diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2014-08-10 04:10:25 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-08-10 05:28:05 +1000 |
| commit | 6c6ae061b61c1fd0d1823765299bcc009ddc21c8 (patch) | |
| tree | 7bf69035d788a789ae88ee900f76bfbc32b5a2d6 /drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c | |
| parent | bbf8906b2cad17cf9530b06db7509d0e39b02d16 (diff) | |
drm/nouveau/fifo: allow direct access to channel control registers where possible
The indirect method has been left in-place here as a fallback path, as
it may not be possible to map the non-PAGE_SIZE aligned control areas
across some chipset+interface combinations.
This isn't a problem for the primary use-case where the core and drm
are linked together in kernel-land, but across a VM or (in the case
where it applies now) between the core in the kernel and a userspace
test tool.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c index 90713fdef662..d8dac2fc6a3b 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c @@ -110,6 +110,7 @@ nv10_fifo_ofuncs = { .dtor = nv04_fifo_chan_dtor, .init = nv04_fifo_chan_init, .fini = nv04_fifo_chan_fini, + .map = _nouveau_fifo_channel_map, .rd32 = _nouveau_fifo_channel_rd32, .wr32 = _nouveau_fifo_channel_wr32, }; |