diff options
| author | Yakir Yang <ykk@rock-chips.com> | 2016-06-12 10:56:02 +0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-07-11 14:30:37 +0200 |
| commit | 0355dde26e523002bd8815fb8b17d6c993b6a71b (patch) | |
| tree | c03d606426397fd6d9d73673045b2c456b841907 /drivers/gpu/drm/panel/panel-simple.c | |
| parent | 633a25966a206c96dd81a7361b0cf01406035f27 (diff) | |
drm/panel: simple: Add support for LG LP097QX1-SPA1 panel
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/panel/panel-simple.c')
| -rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f503d12b3930..dd06ee7178c7 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1019,6 +1019,28 @@ static const struct panel_desc lg_lb070wv8 = { .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, }; +static const struct drm_display_mode lg_lp097qx1_spa1_mode = { + .clock = 205210, + .hdisplay = 2048, + .hsync_start = 2048 + 150, + .hsync_end = 2048 + 150 + 5, + .htotal = 2048 + 150 + 5 + 5, + .vdisplay = 1536, + .vsync_start = 1536 + 3, + .vsync_end = 1536 + 3 + 1, + .vtotal = 1536 + 3 + 1 + 9, + .vrefresh = 60, +}; + +static const struct panel_desc lg_lp097qx1_spa1 = { + .modes = &lg_lp097qx1_spa1_mode, + .num_modes = 1, + .size = { + .width = 208, + .height = 147, + }, +}; + static const struct drm_display_mode lg_lp120up1_mode = { .clock = 162300, .hdisplay = 1920, @@ -1459,6 +1481,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "lg,lb070wv8", .data = &lg_lb070wv8, }, { + .compatible = "lg,lp097qx1-spa1", + .data = &lg_lp097qx1_spa1, + }, { .compatible = "lg,lp120up1", .data = &lg_lp120up1, }, { |