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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-04-15 17:13:29 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-08-30 16:30:06 -0400 |
| commit | 866d83de0c9cc36a598252282bdedc158f50dcc2 (patch) | |
| tree | 1fdb42c35c993599faf48164ea3ee257732795b1 /drivers/gpu/drm/radeon/cikd.h | |
| parent | 7235711a43b6839f5759327d003fa334c4a703f2 (diff) | |
drm/radeon/cik: restructure rlc setup
Restructure rlc setup to handle clock and power
gating.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cikd.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/cikd.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h index d50593fd9cd5..4742f3db4aa6 100644 --- a/drivers/gpu/drm/radeon/cikd.h +++ b/drivers/gpu/drm/radeon/cikd.h @@ -905,6 +905,7 @@ #define RLC_LB_CNTR_MAX 0xC348 #define RLC_LB_CNTL 0xC364 +# define LOAD_BALANCE_ENABLE (1 << 0) #define RLC_LB_CNTR_INIT 0xC36C |