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authorClark Williams <williams@redhat.com>2012-01-05 12:51:32 -0600
committerClark Williams <williams@redhat.com>2012-01-05 12:51:32 -0600
commitd76fe430665fac3f44ee88958713ecc524fd778d (patch)
tree00206c8b11eb2084d38eeccfe4b41f5e89fb779c /drivers/gpu/drm/radeon/evergreen.c
parent63076d7f7f7f2650e5d0a4fa5dd2c412a255c237 (diff)
parent805a6af8dba5dfdd35ec35dc52ec0122400b2610 (diff)
Merge commit 'v3.2' into rt-3.2-rt9v3.2-rt9
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 5e00d1670aa9..92c9628c572d 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev)
rdev->accel_working = false;
}
}
+
+ /* Don't start up if the MC ucode is missing on BTC parts.
+ * The default clocks and voltages before the MC ucode
+ * is loaded are not suffient for advanced operations.
+ */
+ if (ASIC_IS_DCE5(rdev)) {
+ if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) {
+ DRM_ERROR("radeon: MC ucode required for NI+.\n");
+ return -EINVAL;
+ }
+ }
+
return 0;
}