summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/radeon/radeon_cs.c
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2013-06-26 17:37:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-27 10:49:08 -0400
commit963e81f9e060113d3bec1aa95eac76a7d3810879 (patch)
tree69448123db41c34d79a881f53390ce8d0eef7e8b /drivers/gpu/drm/radeon/radeon_cs.c
parent75efdee11b5da3acbbeb43a9b93a9c4fe6d5bec8 (diff)
drm/radeon/cik: Add support for compute queues (v4)
On CIK, the compute rings work slightly differently than on previous asics, however the basic concepts are the same. The main differences: - New MEC engines for compute queues - Multiple queues per MEC: - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues - KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues - Queues can be allocated and scheduled by another queue - New doorbell aperture allows you to assign space in the aperture for the wptr which allows for userspace access to queues v2: add wptr shadow, fix eop setup v3: fix comment v4: switch to new callback method Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cs.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index cf71734a13d0..7e265a58141f 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -121,9 +121,7 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority
p->ring = RADEON_RING_TYPE_GFX_INDEX;
break;
case RADEON_CS_RING_COMPUTE:
- if (p->rdev->family >= CHIP_BONAIRE)
- p->ring = RADEON_RING_TYPE_GFX_INDEX;
- else if (p->rdev->family >= CHIP_TAHITI) {
+ if (p->rdev->family >= CHIP_TAHITI) {
if (p->priority > 0)
p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
else