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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-06-10 20:48:34 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-06-10 20:48:34 -0700
commit78a66b00d97c89a43b1ee753814913c55ec2e3ee (patch)
treee5cb4bcf3db64b0fb0f68c4578e4722397605b71 /drivers/iio/accel/st_accel_core.c
parente703f23747e25db6ccc1f752f787925f86c27f31 (diff)
parentbbf5f037fad47e4affef6696aaf88a40b261e639 (diff)
Merge tag 'iio-for-v4.2c' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes: Third round of new IIO drivers, cleanups and functionality for the 4.2 cycle. Given Linus announced a 4.8rc coming up, hopefully time for one more lot of IIO patches this cycle. Some of these are actually improvements / fixes for patches earlier in the cycle. New device support * st_accel driver - support devices with 8 bit channels. Cleanup * A general cleanup of the iio tools under /tools/ from Hartmut. I'm more than a little embarassed by how bad some of these were! Are well, much more refined and less bug prone now. These cover lots of stuff like unhandled error returns, memory leaks as well as general refactoring to tidy the code up. * iio_simple_dummy - fix memory leaks in the init functions, drop some pointless error returns from functions that never generate errors and make the module parameter explicitly unsigned. * More buffer handling reworks from Lars-Peter, this time targetting hardware buffers (a little used corner that looks likely to get more use in the near future). Specifically: - Always compute the masklength as inkernel buffer users may need it. - Add a means of labeling which buffer modes a given buffer implementation supports. - In the case of hardware buffers, require strict scan matching rather than matching to a superset. Currently the demux is bypassed by these drivers (this may well not change for efficiency reasons) so allowing a superset of channels to be selected would otherwise lead to more data than requested confusing userspace. Driver funcationality improvments * mmc35240 - adds a compensation to the raw values as borrowed form Memsic's own input driver. * mma8452 - event support - event debouncing - high pass filter configuration - triggers * vf610 - allow conversion mode to be adjusted Fixlets * mmc35240 - Off by one error that by coincidence had no real effect. - i2c_device_name should be lowercase. - Lack of null terminator at end of attributes array. - Avoid computing the fractional part of the magnetic field by moving the scaling into userspace where floating point is available to simplify the maths. - Use a smaller sleep before assuming the measurement is done. This is safe and improves the possible polling rate. - Fix sensitivity on z-axis - datasheet disagrees with Memsic's releasedd code and the value used in the code seems to be correct. * stk3310 - make a local variable signed to ensure error handling works. * twl4030 - fix calculation of the temperature sense current - bug unlikely to have ever been noticed as the difference is small. - Fix errors in descriptions.
Diffstat (limited to 'drivers/iio/accel/st_accel_core.c')
-rw-r--r--drivers/iio/accel/st_accel_core.c86
1 files changed, 86 insertions, 0 deletions
diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c
index 211b13271c61..4002e6410444 100644
--- a/drivers/iio/accel/st_accel_core.c
+++ b/drivers/iio/accel/st_accel_core.c
@@ -153,6 +153,44 @@
#define ST_ACCEL_4_IG1_EN_MASK 0x08
#define ST_ACCEL_4_MULTIREAD_BIT true
+/* CUSTOM VALUES FOR SENSOR 5 */
+#define ST_ACCEL_5_WAI_EXP 0x3b
+#define ST_ACCEL_5_ODR_ADDR 0x20
+#define ST_ACCEL_5_ODR_MASK 0x80
+#define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
+#define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
+#define ST_ACCEL_5_PW_ADDR 0x20
+#define ST_ACCEL_5_PW_MASK 0x40
+#define ST_ACCEL_5_FS_ADDR 0x20
+#define ST_ACCEL_5_FS_MASK 0x20
+#define ST_ACCEL_5_FS_AVL_2_VAL 0X00
+#define ST_ACCEL_5_FS_AVL_8_VAL 0X01
+/* TODO: check these resulting gain settings, these are not in the datsheet */
+#define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
+#define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
+#define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
+#define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
+#define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
+#define ST_ACCEL_5_IG1_EN_ADDR 0x21
+#define ST_ACCEL_5_IG1_EN_MASK 0x08
+#define ST_ACCEL_5_MULTIREAD_BIT false
+
+static const struct iio_chan_spec st_accel_8bit_channels[] = {
+ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
+ BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
+ ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
+ ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
+ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
+ BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
+ ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
+ ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
+ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
+ BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
+ ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
+ ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
+ IIO_CHAN_SOFT_TIMESTAMP(3)
+};
+
static const struct iio_chan_spec st_accel_12bit_channels[] = {
ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
@@ -454,6 +492,54 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
.multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
.bootime = 2, /* guess */
},
+ {
+ .wai = ST_ACCEL_5_WAI_EXP,
+ .sensors_supported = {
+ [0] = LIS331DL_ACCEL_DEV_NAME,
+ },
+ .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
+ .odr = {
+ .addr = ST_ACCEL_5_ODR_ADDR,
+ .mask = ST_ACCEL_5_ODR_MASK,
+ .odr_avl = {
+ { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
+ { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
+ },
+ },
+ .pw = {
+ .addr = ST_ACCEL_5_PW_ADDR,
+ .mask = ST_ACCEL_5_PW_MASK,
+ .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
+ .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
+ },
+ .enable_axis = {
+ .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
+ .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
+ },
+ .fs = {
+ .addr = ST_ACCEL_5_FS_ADDR,
+ .mask = ST_ACCEL_5_FS_MASK,
+ .fs_avl = {
+ [0] = {
+ .num = ST_ACCEL_FS_AVL_2G,
+ .value = ST_ACCEL_5_FS_AVL_2_VAL,
+ .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
+ },
+ [1] = {
+ .num = ST_ACCEL_FS_AVL_8G,
+ .value = ST_ACCEL_5_FS_AVL_8_VAL,
+ .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
+ },
+ },
+ },
+ .drdy_irq = {
+ .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
+ .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
+ .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
+ },
+ .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
+ .bootime = 2, /* guess */
+ },
};
static int st_accel_read_raw(struct iio_dev *indio_dev,