diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2019-08-28 15:11:42 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:45:57 +0800 |
| commit | 3bc3ffbe141dacf489dbc3dae7ce46c71574cd77 (patch) | |
| tree | 35d2c599e1879237d2542934211dff45eda5414b /drivers/irqchip | |
| parent | cdcad70321b19d7fe119a8d3277702704acd8d22 (diff) | |
irqchip: irq-imx-gpcv2: fix the suspend/resume on imx8mq
The wakeup irq info need to be provided to ATF side, then
ATF side can config the correct wakeup IRQ when entering
suspend.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'drivers/irqchip')
| -rw-r--r-- | drivers/irqchip/irq-imx-gpcv2.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c index ed5cbf2a566b..c80065bce531 100644 --- a/drivers/irqchip/irq-imx-gpcv2.c +++ b/drivers/irqchip/irq-imx-gpcv2.c @@ -16,6 +16,7 @@ #include <linux/cpuidle.h> #define FSL_SIP_GPC 0xC2000000 +#define FSL_SIP_CONFIG_GPC_SET_WAKE 0x02 #define FSL_SIP_CONFIG_GPC_CORE_WAKE 0x05 #define IMR_NUM 4 @@ -125,6 +126,7 @@ static void imx_gpcv2_wake_request_fixup(void) static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on) { struct gpcv2_irqchip_data *cd = d->chip_data; + struct arm_smccc_res res; unsigned int idx = d->hwirq / 32; unsigned long flags; u32 mask, val; @@ -134,8 +136,14 @@ static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on) val = cd->wakeup_sources[idx]; cd->wakeup_sources[idx] = on ? (val & ~mask) : (val | mask); + +#ifdef CONFIG_ARM64 + arm_smccc_smc(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_SET_WAKE, + d->hwirq, on, 0, 0, 0, 0, &res); +#endif raw_spin_unlock_irqrestore(&cd->rlock, flags); + /* * Do *not* call into the parent, as the GIC doesn't have any * wake-up facility... |