media: video: tegra: add new mode for 1080p

add new mode for 1080p(1920x1080) in ov5650
which outputs the frame of exactly the same
size as 1920x1080.

Bug 859620

Original-Change-Id: I33864185d235bb67cb234e017d3dd3d14e877bf1
Reviewed-on: http://git-master/r/47268
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rebffb0559230ed187907ad697bcc4c88d0f15120

1 files changed, 117 insertions, 0 deletions

diff --git a/drivers/media/video/tegra/ov5650.c b/drivers/media/video/tegra/ov5650.c
index c1d5c6caa77c..9ebd4c1b1a8a 100644
--- a/drivers/media/video/tegra/ov5650.c
+++ b/drivers/media/video/tegra/ov5650.c
@@ -363,6 +363,119 @@ static struct ov5650_reg mode_2080x1164[] = {
 	{OV5650_TABLE_END, 0x0000}
 };
 
+static struct ov5650_reg mode_1920x1080[] = {
+	{0x3103, 0x93}, // power up system clock from PLL page 77
+	{0x3007, 0x3b}, // clock enable03 pg 98
+	{0x3017, 0xff}, // PAD output enable page 100
+	{0x3018, 0xfc}, // PAD output enable page 100
+
+	{0x3600, 0x54}, // analog pg 108
+	{0x3601, 0x05}, // analog pg 108
+	{0x3603, 0xa7}, // analog pg 108
+	{0x3604, 0x40}, // analog pg 108
+	{0x3605, 0x04}, // analog pg 108
+	{0x3606, 0x3f}, // analog pg 108
+	{0x3612, 0x1a}, // analog pg 108
+	{0x3613, 0x44}, // analog pg 108
+	{0x3615, 0x52}, // analog pg 108
+	{0x3620, 0x56}, // analog pg 108
+	{0x3623, 0x01}, // analog pg 108
+	{0x3630, 0x22}, // analog pg 108
+	{0x3631, 0x36}, // analog pg 108
+	{0x3632, 0x5f}, // analog pg 108
+	{0x3633, 0x24}, // analog pg 108
+
+	{0x3702, 0x3a}, // analog pg 108
+	{0x3704, 0x18}, // analog pg 108
+	{0x3706, 0x41}, // analog pg 108
+	{0x370b, 0x40}, // analog pg 108
+	{0x370e, 0x00}, // analog pg 108
+	{0x3710, 0x28}, // analog pg 108
+	{0x3711, 0x24},
+	{0x3712, 0x13}, // analog pg 10
+
+	{0x3810, 0x00}, // TIMING HVOFFS both are zero pg 80
+	{0x3815, 0x82}, // PCLK to SCLK ratio bit[4:0] is set to 2 pg 81
+
+	{0x3830, 0x50}, // manual exposure gain bit [0]
+	{0x3836, 0x00}, // TIMING HVPAD both are zero pg 82
+
+	{0x3a1a, 0x06}, // DIFF MAX an AEC register??? pg 114
+	{0x3a18, 0x00}, // AEC gain ceiling bit 8 pg 114
+	{0x3a19, 0xf8}, // AEC gain ceiling pg 114
+	{0x3a00, 0x38}, // AEC control 0 debug mode band low limit mode band func pg 112
+	{0x3a0d, 0x06}, // b60 max pg 113
+	{0x3c01, 0x34}, // 5060HZ_CTRL01 pg 116
+
+	{0x401f, 0x03}, // BLC enabled pg 120
+	{0x4000, 0x05}, // BLC enabled pg 120
+	{0x401d, 0x08}, // reserved pg 120
+	{0x4001, 0x02}, // BLC control pg 120
+
+	{0x5000, 0x00}, // ISP control00 features are disabled. pg 132
+	{0x5001, 0x00}, // ISP control01 awb disabled. pg 132
+	{0x5002, 0x00}, // ISP control02 debug mode disabled pg 132
+	{0x503d, 0x00}, // ISP control3D features disabled pg 133
+	{0x5046, 0x00}, // ISP control isp disable awbg disable pg 133
+
+	{0x300f, 0x8f}, // PLL control00 R_SELD5 [7:6] div by 4 R_DIVL [2] two lane div 1 SELD2P5 [1:0] div 2.5 pg 99
+	{0x3010, 0x10}, // PLL control01 DIVM [3:0] DIVS [7:4] div 1 pg 99
+	{0x3011, 0x14}, // PLL control02 R_DIVP [5:0] div 20 pg 99
+	{0x3012, 0x02}, // PLL CTR 03, default
+	{0x3503, 0x33}, // AEC auto AGC auto gain has delay of 2 frames. pg 38
+
+	{0x3621, 0x2f}, // analog horizontal binning/sampling not enabled. pg 108
+	{0x3703, 0xe6}, // analog pg 108
+	{0x370c, 0x00}, // analog pg 108
+	{0x370d, 0x04}, // analog pg 108
+	{0x3713, 0x22}, // analog pg 108
+	{0x3714, 0x27},
+	{0x3705, 0xda},
+	{0x370a, 0x80},
+
+	{0x3800, 0x02}, // HREF start point higher 4 bits [3:0] pg 108
+	{0x3801, 0x94}, // HREF start point lower  8 bits [7:0] pg 108
+	{0x3802, 0x00}, // VREF start point higher 4 bits [3:0] pg 108
+	{0x3803, 0x0c}, // VREF start point [7:0] pg 108
+	{0x3804, 0x07}, // HREF width  higher 4 bits [3:0] pg 108
+	{0x3805, 0x80}, // HREF width  lower  8 bits [7:0] pg 108
+	{0x3806, 0x04}, // VREF height higher 4 bits [3:0] pg 109
+	{0x3807, 0x38}, // VREF height lower  8 bits [7:0] pg 109
+	{0x3808, 0x07}, // DVP horizontal output size higher 4 bits [3:0] pg 109
+	{0x3809, 0x80}, // DVP horizontal output size lower  8 bits [7:0] pg 109
+	{0x380a, 0x04}, // DVP vertical   output size higher 4 bits [3:0] pg 109
+	{0x380b, 0x38}, // DVP vertical   output size lower  8 bits [7:0] pg 109
+	{0x380c, 0x0a}, // total horizontal size higher 5 bits [4:0] pg 109, line length
+	{0x380d, 0x84}, // total horizontal size lower  8 bits [7:0] pg 109, line length
+	{0x380e, 0x04}, // total vertical   size higher 5 bits [4:0] pg 109, frame length
+	{0x380f, 0xa4}, // total vertical   size lower  8 bits [7:0] pg 109, frame length
+	{0x3818, 0xc0}, // timing control reg18 mirror & dkhf pg 110
+	{0x381a, 0x3c}, // HS mirror adjustment pg 110
+	{0x381c, 0x31},
+	{0x381d, 0xa4},
+	{0x381e, 0x04},
+	{0x381f, 0x60},
+	{0x3820, 0x03},
+	{0x3821, 0x1a},
+	{0x3824, 0x01},
+	{0x3827, 0x0a},
+	{0x401c, 0x46},
+
+	{0x3003, 0x03}, // reset MIPI and DVP pg 97
+	{0x3500, 0x00}, // long exp 1/3 in unit of 1/16 line, pg 38
+	{0x3501, 0x49}, // long exp 2/3 in unit of 1/16 line, pg 38
+	{0x3502, 0xa0}, // long exp 3/3 in unit of 1/16 line, pg 38
+	{0x350a, 0x00}, // gain output to sensor, pg 38
+	{0x350b, 0x00}, // gain output to sensor, pg 38
+	{0x4801, 0x0f}, // MIPI control01 pg 125
+	{0x300e, 0x0c}, // SC_MIPI_SC_CTRL0 pg 73
+	{0x4803, 0x50}, // MIPI CTRL3 pg 91
+	{0x4800, 0x34}, // MIPI CTRl0 idle and short line pg 89
+
+	{OV5650_TABLE_END, 0x0000}
+};
+
+
 static struct ov5650_reg mode_1264x704[] = {
 	{0x3600, 0x54}, /* analog pg 108 */
 	{0x3601, 0x05}, /* analog pg 108 */
@@ -467,6 +580,7 @@ enum {
 	OV5650_MODE_2592x1944,
 	OV5650_MODE_1296x972,
 	OV5650_MODE_2080x1164,
+	OV5650_MODE_1920x1080,
 	OV5650_MODE_1264x704,
 	OV5650_MODE_INVALID
 };
@@ -475,6 +589,7 @@ static struct ov5650_reg *mode_table[] = {
 	[OV5650_MODE_2592x1944] = mode_2592x1944,
 	[OV5650_MODE_1296x972] = mode_1296x972,
 	[OV5650_MODE_2080x1164] = mode_2080x1164,
+	[OV5650_MODE_1920x1080] = mode_1920x1080,
 	[OV5650_MODE_1264x704] = mode_1264x704
 };
 
@@ -671,6 +786,8 @@ static int ov5650_set_mode(struct ov5650_info *info, struct ov5650_mode *mode)
 		sensor_mode = OV5650_MODE_1296x972;
 	else if (mode->xres == 2080 && mode->yres == 1164)
 		sensor_mode = OV5650_MODE_2080x1164;
+	else if (mode->xres == 1920 && mode->yres == 1080)
+		sensor_mode = OV5650_MODE_1920x1080;
 	else if (mode->xres == 1264 && mode->yres == 704)
 		sensor_mode = OV5650_MODE_1264x704;
 	else {